1. 21 6月, 2012 1 次提交
  2. 04 11月, 2011 4 次提交
  3. 22 10月, 2011 2 次提交
  4. 06 10月, 2011 1 次提交
  5. 14 1月, 2011 1 次提交
  6. 27 10月, 2010 2 次提交
    • W
      Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value · 25ddd1fb
      Wolfgang Denk 提交于
      CONFIG_SYS_GBL_DATA_SIZE has always been just a bad workarond for not
      being able to use "sizeof(struct global_data)" in assembler files.
      Recent experience has shown that manual synchronization is not
      reliable enough.  This patch renames CONFIG_SYS_GBL_DATA_SIZE into
      GENERATED_GBL_DATA_SIZE which gets automatically generated by the
      asm-offsets tool.  In the result, all definitions of this value can be
      deleted from the board config files.  We have to make sure that all
      files that reference such data include the new <asm-offsets.h> file.
      
      No other changes have been done yet, but it is obvious that similar
      changes / simplifications can be done for other, related macro
      definitions as well.
      Signed-off-by: NWolfgang Denk <wd@denx.de>
      Acked-by: NKumar Gala <galak@kernel.crashing.org>
      25ddd1fb
    • W
      Rename CONFIG_SYS_INIT_RAM_END into CONFIG_SYS_INIT_RAM_SIZE · 553f0982
      Wolfgang Denk 提交于
      CONFIG_SYS_INIT_RAM_END was a misnomer as it suggests this might be
      some end address; to make the meaning more clear we rename it into
      CONFIG_SYS_INIT_RAM_SIZE
      
      No other code changes are performed in this patch, only minor editing
      of white space (due to the changed length) and the comments was done,
      where noticed.
      
      Note that the code for the PATI and cmi_mpc5xx board configurations
      looks seriously broken.  Last known maintainers on Cc:
      Signed-off-by: NWolfgang Denk <wd@denx.de>
      Cc: Denis Peter <d.peter@mpl.ch>
      Cc: Martin Winistoerfer <martinwinistoerfer@gmx.ch>
      Acked-by: NKumar Gala <galak@kernel.crashing.org>
      553f0982
  7. 19 10月, 2010 3 次提交
    • P
      powerpc: Cleanup BOOTFLAG_* references · d98b0523
      Peter Tyser 提交于
      Now that warm booting is not supported, there isn't a need for the
      BOOTFLAG_COLD and BOOTFLAG_WARM defines, so remove them.
      
      Note that this change makes the board info bd_bootflags field useless.
      It will always be set to 0, but we leave it around so that we don't
      break the board info structure that some OSes are expecting to be passed
      from U-Boot.
      Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
      d98b0523
    • W
      Makefile: move all Power Architecture boards into boards.cfg · 2ae18241
      Wolfgang Denk 提交于
      Clean up Makefile, and drop a lot of the config.mk files on the way.
      
      We now also automatically pick all boards that are listed in
      boards.cfg (and with all configurations), so we can drop the redundant
      entries from MAKEALL to avoid building these twice.
      Signed-off-by: NWolfgang Denk <wd@denx.de>
      2ae18241
    • W
      Rename TEXT_BASE into CONFIG_SYS_TEXT_BASE · 14d0a02a
      Wolfgang Denk 提交于
      The change is currently needed to be able to remove the board
      configuration scripting from the top level Makefile and replace it by
      a simple, table driven script.
      
      Moving this configuration setting into the "CONFIG_*" name space is
      also desirable because it is needed if we ever should move forward to
      a Kconfig driven configuration system.
      Signed-off-by: NWolfgang Denk <wd@denx.de>
      14d0a02a
  8. 24 9月, 2010 1 次提交
  9. 23 9月, 2010 1 次提交
  10. 16 7月, 2010 1 次提交
  11. 23 4月, 2010 2 次提交
    • K
      mpc83xx: turn on icache in core initialization to improve u-boot boot time · 1a2e203b
      Kim Phillips 提交于
      before, MPC8349ITX boots u-boot in 4.3sec:
      
              column1 is elapsed time since first message
              column2 is elapsed time since previous message
              column3 is the message
      0.000 0.000: U-Boot 2010.03-00126-gfd4e49c1 (Apr 11 2010 - 17:25:29) MPC83XX
      0.000 0.000:
      0.000 0.000: Reset Status:
      0.000 0.000:
      0.032 0.032: CPU:   e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz
      0.032 0.000: Board: Freescale MPC8349E-mITX
      0.032 0.000: UPMA:  Configured for compact flash
      0.032 0.000: I2C:   ready
      0.061 0.028: DRAM:  256 MB (DDR1, 64-bit, ECC off, 266.667 MHz)
      1.516 1.456: FLASH: 16 MB
      2.641 1.125: PCI:   Bus Dev VenId DevId Class Int
      2.652 0.011:         00  10  1095  3114  0180  00
      2.652 0.000: PCI:   Bus Dev VenId DevId Class Int
      2.652 0.000: In:    serial
      2.652 0.000: Out:   serial
      2.652 0.000: Err:   serial
      2.682 0.030: Board revision: 1.0 (PCF8475A)
      3.080 0.398: Net:   TSEC1: No support for PHY id ffffffff; assuming generic
      3.080 0.000: TSEC0, TSEC1
      4.300 1.219: IDE:   Bus 0: .** Timeout **
      
      after, MPC8349ITX boots u-boot in 3.0sec:
      
      0.010 0.010: U-Boot 2010.03-00127-g4b468cc-dirty (Apr 11 2010 - 17:47:29) MPC83XX
      0.010 0.000:
      0.010 0.000: Reset Status:
      0.010 0.000:
      0.017 0.007: CPU:   e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz
      0.017 0.000: Board: Freescale MPC8349E-mITX
      0.038 0.020: UPMA:  Configured for compact flash
      0.038 0.000: I2C:   ready
      0.038 0.000: DRAM:  256 MB (DDR1, 64-bit, ECC off, 266.667 MHz)
      0.260 0.222: FLASH: 16 MB
      1.390 1.130: PCI:   Bus Dev VenId DevId Class Int
      1.390 0.000:         00  10  1095  3114  0180  00
      1.390 0.000: PCI:   Bus Dev VenId DevId Class Int
      1.400 0.010: In:    serial
      1.400 0.000: Out:   serial
      1.400 0.000: Err:   serial
      1.400 0.000: Board revision: 1.0 (PCF8475A)
      1.832 0.432: Net:   TSEC1: No support for PHY id ffffffff; assuming generic
      1.832 0.000: TSEC0, TSEC1
      3.038 1.205: IDE:   Bus 0: .** Timeout **
      
      also tested on these boards (albeit with a less accurate
      boottime measurement method):
      
      seconds: before  after
      8349MDS  ~2.6    ~2.2
      8360MDS  ~2.8    ~2.6
      8313RDB  ~2.5    ~2.3 #nand boot
      837xRDB  ~3.1    ~2.3
      
      also tested on an 8323ERDB.
      
      v2: also remove the delayed icache enablement assumption in arch ppc's
      board.c, and add a CONFIG_MPC83xx define in the ITX config file for
      consistency (even though it was already being defined in 83xx'
      config.mk).
      Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
      1a2e203b
    • K
      mpc83xx: enable command line autocompletion · a059e90e
      Kim Phillips 提交于
      because it's convenient.
      Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
      a059e90e
  12. 23 2月, 2010 1 次提交
  13. 09 12月, 2009 1 次提交
  14. 27 9月, 2009 1 次提交
    • K
      mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfields · c7190f02
      Kim Phillips 提交于
      some LCRR bits are not documented throughout the 83xx family RMs.
      New board porters copying similar board configurations might omit
      setting e.g., DBYP since it was not documented in their SoC's RM.
      
      Prevent them bricking their board by retaining power on reset values
      in bit fields that the board porter doesn't explicitly configure
      via CONFIG_SYS_<registername>_<bitfield> assignments in the board
      config file.
      
      also move LCRR assignment to cpu_init_r[am] to help ensure no
      transactions are being executed via the local bus while CLKDIV is being
      modified.
      
      also start to use i/o accessors.
      Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
      c7190f02
  15. 22 8月, 2009 2 次提交
  16. 27 7月, 2009 1 次提交
  17. 18 7月, 2009 1 次提交
  18. 17 7月, 2009 1 次提交
    • A
      mpc83xx: MPC837XERDB: Add support for FSL eSDHC · c9646ed7
      Anton Vorontsov 提交于
      This patch adds support for eSDHC on MPC837XERDB boards. The WP
      switch doesn't seem to work on RDB boards though, the WP pin is
      always asserted (can see the pin state when it's in GPIO mode).
      
      FSL DR USB and FSL eSDHC are mutually exclusive because of pins
      multiplexing, so user should specify 'esdhc' or 'dr_usb' options
      in the hwconfig environment variable to choose between the
      devices.
      
      p.s.
      Now we're very close to a monitor len limit (196 bytes left using
      gcc-4.2.0), so also increase the monitor len by one sector (64 KB).
      Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
      Acked-by: NKim Phillips <kim.phillips@freescale.com>
      c9646ed7
  19. 15 7月, 2009 1 次提交
  20. 13 6月, 2009 2 次提交
  21. 24 2月, 2009 1 次提交
  22. 18 2月, 2009 1 次提交
  23. 19 10月, 2008 1 次提交
  24. 15 10月, 2008 1 次提交
  25. 24 9月, 2008 2 次提交
  26. 11 9月, 2008 3 次提交
  27. 13 8月, 2008 1 次提交