- Update SPDX tag in arch/arm/mach-socfpga/spl_a10.c
Signed-off-by: NTom Rini <trini@konsulko.com>

Fix compilation warning when enable CONFIG_DEBUG_UART.

arch/arm/mach-socfpga/spl_s10.c: In function ‘board_init_f’:
arch/arm/mach-socfpga/spl_s10.c:146:2: warning: implicit declaration of function ‘debug_uart_init’; did you mean ‘part_init’? [-Wimplicit-function-declaration]
  debug_uart_init();
Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>

MCR instruction only available in ARM 32-bit. So, compile MCR instruction
when ARM 32-bit is enabled.
Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>

Commit 5dfd5607af2114047bd ("ARM: socfpga: Pull DRAM size from DT") get
memory size from DT. So, we need to update memory size in memory node.
Otherwise, it cause U-boot hang.
Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>

When doing "i2c dev 4; i2c probe" with ENET daughter card connected
on iMX8QXP MEK board, we met a i2c bus busy issue, that the BBF of
lpi2c always show busy, but the master is idle, and stop is detected
(SDF set).

This patch addes a handling to re-init the lpi2c master for this
case. Then the issue can be worked around.
Signed-off-by: NYe Li <ye.li@nxp.com>
Acked-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NHeiko Schocher <hs@denx.de>

In xfer function, both bus_i2c_read and bus_i2c_write will
send a STOP command.  This causes a problem when reading register
data from i2c device.

Generally two operations comprise the register data reading:
   1. Write the register address to i2c device.
      START | chip_addr | W | ACK | register_addr | ACK |

   2. Read the Data from i2c device.
      START | chip_addr | R | ACK | DATA          | NACK | STOP

The STOP command should happen at the end of the transfer, otherwise
we will always get data from register address 0
Signed-off-by: NYe Li <ye.li@nxp.com>
Acked-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NHeiko Schocher <hs@denx.de>

For LPI2C IP, NACK is detected by the rising edge of the ninth clock.
In current uboot driver, once NACK is detected, it will reset and then
disable LPI2C master. As a result, we can never see the falling edge
of the ninth clock.
Signed-off-by: NGao Pan <pandy.gao@nxp.com>
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Add compatible string for i.MX8 and move imx_lpi2c.h from mx7ulp directory
to u-boot include directory as a common header file.
Signed-off-by: NYe Li <ye.li@nxp.com>
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Make sure the ARM ACTLR register has correct configuration, otherwise
the Linux kernel refuses to boot. In particular, the "Write Full Line
of Zeroes" bit must be cleared.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>

The SPL can also parse the DRAM configuration node to figure out the
memory layout, make sure it is available.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>

Pull the DRAM size from DT instead of hardcoding it into U-Boot.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>

The SDRAM must first be rewritten by zeroes if ECC is used to initialize
the ECC metadata. Make the CPU overwrite the DRAM with zeroes in such a
case. This scrubbing implementation turns the caches on temporarily, then
overwrites the whole RAM with zeroes, flushes the caches and turns them
off again. This provides satisfactory performance.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>

This function was never used in SPL and the default implementation of
dram_bank_mmu_setup() does the same thing. The only difference is the
part which configures OCRAM as cachable, which doesn't really work as
it covers more than the OCRAM.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>

Add do_bridge_reset() function for Arria 10, it is required by misc.c.

arch/arm/mach-socfpga/built-in.o: In function `do_bridge':
arch/arm/mach-socfpga/misc.c:221: undefined reference to `do_bridge_reset'
make[1]: *** [u-boot] Error 1
Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>

Add build support for Stratix SoC
Signed-off-by: NChin Liang See <chin.liang.see@intel.com>
Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>

Conflicts:

	arch/arm/Kconfig
	arch/arm/mach-socfpga/Kconfig

Add socdk board support for Stratix SoC
Signed-off-by: NChin Liang See <chin.liang.see@intel.com>
Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>

Add DDR support for Stratix SoC
Signed-off-by: NChin Liang See <chin.liang.see@intel.com>
Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>

Add timer support for Stratix SoC
Signed-off-by: NChin Liang See <chin.liang.see@intel.com>
Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: NMarek Vasut <marex@denx.de>

Add SPL driver support for Stratix SoC
Signed-off-by: NChin Liang See <chin.liang.see@intel.com>
Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>

Restructure the SPL so each devices such as CV, A10 and S10
will have their own dedicated SPL file. SPL file determine
the HW initialization flow which is device specific
Signed-off-by: NChin Liang See <chin.liang.see@intel.com>
Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>

Add MMU memory mapping table for Stratix SoC.
Signed-off-by: NChin Liang See <chin.liang.see@intel.com>
Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>
Acked-by: NMarek Vasut <marex@denx.de>

Add mailbox support for Stratix SoC
Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: NChin Liang See <chin.liang.see@intel.com>
Reviewed-by: NMarek Vasut <marex@denx.de>

Add misc support such as EMAC and cpu info printout for Stratix SoC
Signed-off-by: NChin Liang See <chin.liang.see@intel.com>
Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>

Move bridge command to misc common driver, in preparation to used by
other platforms.
Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>

Use "%p" to print cmdbuf.

Compilation warning as below:

  CC      spl/drivers/spi/cadence_qspi_apb.o
  LD      spl/lib/built-in.o
drivers/spi/cadence_qspi_apb.c: In function ‘cadence_qspi_apb_indirect_write_setup’:
drivers/spi/cadence_qspi_apb.c:696:18: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
          cmdlen, (unsigned int)cmdbuf);
Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>
Acked-by: NMarek Vasut <marex@denx.de>

Use "%zu" for size_t data type.

Compilation warning as below:

In file included from include/linux/bug.h:7:0,
                 from include/common.h:26,
                 from drivers/spi/cadence_qspi.c:8:
drivers/spi/cadence_qspi.c: In function ‘cadence_spi_xfer’:
drivers/spi/cadence_qspi.c:211:8: warning: format ‘%d’ expects argument of type ‘int’, but argument 3 has type ‘size_t {aka long unsigned int}’ [-Wformat=]
  debug("%s: len=%d [bytes]\n", __func__, data_bytes);
        ^
include/linux/printk.h:37:21: note: in definition of macro ‘pr_fmt’
 #define pr_fmt(fmt) fmt
                     ^~~
include/log.h:142:2: note: in expansion of macro ‘debug_cond’
  debug_cond(_DEBUG, fmt, ##args)
  ^~~~~~~~~~
drivers/spi/cadence_qspi.c:211:2: note: in expansion of macro ‘debug’
  debug("%s: len=%d [bytes]\n", __func__, data_bytes);
Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>
Acked-by: NMarek Vasut <marex@denx.de>

By checking ubifs source code, s_instances parameter is not
used anymore. So, set this parameter and the associated source
code under __UBOOT__ compilation.
Signed-off-by: NChristophe Kerello <christophe.kerello@st.com>
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

When trying to attach an UBI MTD partition via "ubi part", it may happen
that the MTD partition defined in U-Boot (via mtdparts) is not big
enough than the one, where the UBI device has been created on. This
may lead to errors, which are not really descriptive to debug and
solve this issue, like:

ubi0 error: vtbl_check: too large reserved_pebs 1982, good PEBs 1020
ubi0 error: vtbl_check: volume table check failed: record 0, error 9

or:

ubi0 error: init_volumes: not enough PEBs, required 1738, available 1020
ubi0 error: ubi_wl_init: no enough physical eraseblocks (-718, need 1)
ubi0 error: ubi_attach_mtd_dev: failed to attach mtd1, error -12

Lets add an additional message upon attach failure, to aid the U-Boot
user to solve this problem.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Heiko Schocher <hs@denx.de>

When using static volumes, the file size stored in the volume is
determined at runtime. Currently the ubi command prints the file
size specified on the console, which leads to a rather confusing
series of messages:
  # ubi read ${fdt_addr_r} testvol
  Read 0 bytes from volume testvol to 82000000
  No size specified -> Using max size (179924992)

Make sure to print the actual size read in any case:
  # ubi read ${fdt_addr_r} testvol
  No size specified -> Using max size (179924992)
  Read 179924992 bytes from volume testvol to 82000000
Signed-off-by: NStefan Agner <stefan.agner@toradex.com>

In the device tree, the address for the led is located
in the parent node (for exemple leds), not in the led node
(for exemple led@0).

The commit "led: bcm6328: convert to use live dt"
(sha1: 89945517)
change this behaviour and read the address in the led node.

We fix this by reading the base address for led
in the parent node.
Signed-off-by: NPhilippe Reynes <philippe.reynes@softathome.com>

In the device tree, the address for cpu is located in
the node "cpus", not in the cpu node (for exemple cpu@0).
So when probing cpu, the cpu address must be read in the
cpu parent.

The commit "cpu: bmips: convert to use live dt"
(sha1: c444afbb)
change this behaviour and read the address in the
cpu node when probing cpu.

We fix this by reading the address in the cpu parent.
Signed-off-by: NPhilippe Reynes <philippe.reynes@softathome.com>

Now that Travis CI is building with gcc-7.3.0, we can add
build coverage for all combinations of MIPS Release 6
instruction sets (MIPS32, MIPS64, Big Endian, Little Endian).

Add mew default configs for Boston board for all MIPS Release 6
variants.
Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>

Since commit f9167573 (imx: Create distinct pre-processed mkimage
config files), *.cfgtmp files are no longer generated. There is no need
to remove them on the 'clean' target anymore.

Rename the .gitignore glob to *.cfgout.

Cc: Trent Piepho <tpiepho@impinj.com>
Signed-off-by: NBaruch Siach <baruch@tkos.co.il>

When generating timestamps in signatures, use imagetool_get_source_date()
so we can be overridden by SOURCE_DATE_EPOCH to generate reproducible
images.
Signed-off-by: NAlex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromum.org>

So we can use imagetool_get_source_date() from callers who do not have
the image tool params struct, just pass in the command name for the error
message.
Signed-off-by: NAlex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromum.org>

In ARM 64-bits, memory size can be supported is more than 4GB,
hence increasing save array is needed to cope with testing larger memory.
Signed-off-by: NTien Fong Chee <tien.fong.chee@intel.com>