- 11 8月, 2012 8 次提交
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由 Kenth Eriksson 提交于
Support for DS1388 is added by extending the DS1337 driver. DS1388 is similar to DS1337. The time registers are offset by 1 (due to support for hundreds of seconds), and there is no century bit. The configuration and trickle charge registers are also different. Tested on hardware with Freescale P2010 and DS1388. Signed-off-by: NKenth Eriksson <kenth.eriksson@transmode.com>
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由 Horst Kronstorfer 提交于
Make sure that $(LDSCRIPT) is not empty before calling process_lds with 'cat $(LDSCRIPT)' else cat will block waiting for input from stdin. Signed-off-by: NHorst Kronstorfer <hkronsto@frequentis.com>
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由 Daniel Schwierzeck 提交于
Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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由 Daniel Schwierzeck 提交于
Synchronize with ALL-y handling and code in spl/Makefile. Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com> Acked-by: NMike Frysinger <vapier@gentoo.org>
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由 Daniel Schwierzeck 提交于
The top Makefile and the SPL Makefile have lines like those: ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),) LIBS += $(CPUDIR)/omap-common/libomap-common.o endif ifeq ($(SOC),mx5) LIBS += $(CPUDIR)/imx-common/libimx-common.o endif This should be done in the arch/CPU/SoC specific sub-makefiles to keep the top Makefiles clean. This patch also allows adding of new arch/CPU/SoC specific libraries in the future without touching the top Makefiles. Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com> Acked-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Fixes the build-time warning: board.c: At top level: board.c:106: warning: 'pmu_init' defined but not used This makes the ifdef logic at the call site match the logic at the function definition. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Fixes the build-time warning: board.c: In function 'board_init_r': board.c:304: warning: unused variable 's' Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Nothing is using this, so punt it from the gd. Seems to just be a copy & paste wart from the initial port. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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- 10 8月, 2012 18 次提交
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由 Jorgen Lundman 提交于
U-Boot port is based on sources forked from GRUB-0.97 by Sun in 2004, which can be found here: http://src.opensolaris.org/source/xref/onnv/onnv-gate/usr/src/grub/grub-0.97/stage2/zfs-include/zfs.h Released by Sun for GRUB under the license: * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. GRUB official releases include ZFS in version: ftp://alpha.gnu.org/gnu/grub/grub-1.99~rc1.tar.gz And patched against GRUB Bazaar repository for ashift fixes (4KB HDDs) more conveniently found at github: https://github.com/pendor/grub-zfs/commit/e7b6ef3ac3b9685ac4c394c897b1d4221b7381f1Signed-off-by: NJorgen Lundman <lundman@lundman.net>
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由 Charles Manning 提交于
This patch updates the yaffs2 in u-boot to correspond to git://www.aleph1.co.uk/yaffs2 commit id 9ee5d0643e559568dbe62215f76e0a7bd5a63d93 Signed-off-by: NCharles Manning <cdhmanning@gmail.com>
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由 Julius Baxter 提交于
When reset code is in flash, the jump instructions emitted by the compiler are relative instead of absolute jumps. A fix to the reset code to make correct jumps to the beginning of code relocated to RAM have also been added. Signed-off-by: NJulius Baxter <juliusbaxter@gmail.com>
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由 Jens Scharsig 提交于
* rename board directory to eb_cpu5282 * rename EB+MCF-EV123_.*config to eb_cpu5282_.*config * add Maintainer for EB+CPU5282 board * rename prompt Signed-off-by: NJens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
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由 Dirk Eibach 提交于
When CONFIG_ZERO_BOOTDELAY_CHECK is not defined, bootdelay==0 prevents the check for console input (as stated in README.autoboot). This must also work in CONFIG_AUTOBOOT_KEYED mode. Signed-off-by: NDirk Eibach <eibach@gdsys.de>
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由 Allen Martin 提交于
Add support for specifying a differnt CPU for main u-boot and SPL u-boot builds. This is done by adding an optional SPL CPU after the main CPU in boards.cfg as follows: normal_cpu:spl_cpu This this case CPU will be set to "normal_cpu" during the main u-boot build and "spl_cpu" during the SPL build. Signed-off-by: NAllen Martin <amartin@nvidia.com>
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由 Fabio Estevam 提交于
CONFIG_DISCOVER_PHY is not used anywhere, so remove it from config files. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Timo Ketola 提交于
Signed-off-by: NTimo Ketola <timo@exertus.fi>
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由 Prabhakar Kushwaha 提交于
Prototype declaration of I/O operation functions are not correct. as both 'extern' and function definition are at same place. Chage protoype declaration as static. Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
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由 Prabhakar Kushwaha 提交于
Return type of in_8, in_be16 and in_le16 should not be'int'. Update it to type u8/u16/u32. Although 'unsigned' for in_be32 and in_le32 is correct. But to make return type uniform across the file changed to u32 Similarly, parameter passed to out_8, out_be16, out_le16 ,out_be32 & out_le32 should not be 'int'.Change it to type u8/u16/u32. Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
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由 Bernhard Walle 提交于
In addition to the error message also display the error code. I had the problem that my malloc memory was not enough (ENOMEM), and if u-boot had displayed the error code immediately that would have saved me some debugging. Signed-off-by: NBernhard Walle <walle@corscience.de> Use ubifs_err instead of printf. Add "errno=%d" in output as suggested by Albert Aribaud. Signed-off-by: NThomas Weber <weber@corscience.de>
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由 Simon Glass 提交于
Since run_command() and run_command_list() are important and a little confusing, add some basic tests to check that the behaviour is correct. Note: I am not sure that this should be committed, nor where it should go in the source tree. Comments welcome. To run the unit tests use the ut_cmd command available in sandbox: make sandbox_config make ./u-boot -c ut_cmd (To test both hush and built-in parsers, you need to manually change CONFIG_SYS_HUSH_PARSER in include/configs/sandbox.h and build/run again) Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Any environment variable can hold commands to be executed by the 'run' command. The environment variables preboot, bootcmd and menucmd have special code for triggering execution in certain circumstances. We adjust these calls to use run_command_list() instead of run_command(). This change permits these variables to have embedded newlines so that they work the same as the 'source' command. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
This new function runs a list of commands separated by semicolon or newline. We move this out of cmd_source so that it can be used by other code. The PXE code also uses the new function. Suggested-by: NMichael Walle <michael@walle.cc> Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Marek Vasut 提交于
In file included from arch/arm/lib/board.c:43:0: include/malloc.h:490:5: warning: "HAVE_MMAP" is not defined [-Wundef] include/malloc.h:590:5: warning: "HAVE_USR_INCLUDE_MALLOC_H" is not defined [-Wundef] include/malloc.h:757:5: warning: "HAVE_MMAP" is not defined [-Wundef] Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Cc: Wolfgang Denk <wd@denx.de>
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由 Mike Frysinger 提交于
All the global flag defines are the same across all arches. So unify them in one place, and add a simple way for arches to extend for their needs. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Andy Fleming 提交于
If we build everything correctly with multiple builds, and an ERR directory had been previously created, we failed to report that everything was fine because grep failed to find anything in the ERR directory. Use grep -r, which doesn't complain if there are no input files. Signed-off-by: NAndy Fleming <afleming@freescale.com> Tested-by: NTom Rini <trini@ti.com>
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git://git.denx.de/u-boot-mpc85xx由 Wolfgang Denk 提交于
* 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/85xx: use CONFIG_SYS_FSL_PCIE_COMPAT macro when setting the PCI LIODNs powerpc/mpc85xx: Ignore E bit for BSC9130/1 powerpc/sgmii: To support PHY link state auto detect in SGMII mode powerpc/85xx: improve definition of BR_PHYS_ADDR macro powerpc/p2041: configure the CPLD lane_mux according to RCW powerpc/ddr: fix fsl_ddr_get_dimm_params compile error powerpc/corenet: fix compile error when CONFIG_SYS_NO_FLASH is defined powerpc/mpc8xxx: fix workaround for errata DDR111 and DDR134 for DDR over 4GB powerpc/p1022ds: fix DIU/LBC switching with NAND enabled powerpc/p1022ds: add support for SPI and SD boot Signed-off-by: NWolfgang Denk <wd@denx.de>
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- 09 8月, 2012 10 次提交
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由 Timur Tabi 提交于
The SET_PCI_LIODN() macro takes a compatible property string as a parameter, so that it knows which PCI device tree node to look for. The calls to these macros are using a hard-coded string, but we already have the CONFIG_SYS_FSL_PCIE_COMPAT macro which contains the same string, so we should use that. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NAndy Fleming <afleming@freescale.com>
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由 York Sun 提交于
Commit 48f6a5c3 removed E bit. BSC9130/1 were left out due to patch apply timing. Remove them now. Signed-off-by: NYork Sun <yorksun@freescale.com> Signed-off-by: NAndy Fleming <afleming@freescale.com>
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由 Hongtao Jia 提交于
PHYs on SGMII riser card are used in SGMII mode with different external IRQs from eTSEC. This means in SGMII mode phy-handle and phy-connection-type under ethernet node should be updated. Otherwise the PHY interrupt can not be handled therefor PHY link state change can not be auto detected. For we have seperate SGMII PHY nodes, ethernet PHY reg fixup is not needed but it's still be kept to guarantee the sgmii mode could work with old device tree. Signed-off-by: NLi Yang <leoli@freescale.com> Signed-off-by: NJia Hongtao <B38951@freescale.com> Signed-off-by: NAndy Fleming <afleming@freescale.com>
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由 Timur Tabi 提交于
The BR_PHYS_ADDR(x) macro was missing parentheses around "x" in the macro definition, so callers had to supply their own parenthesis. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NAndy Fleming <afleming@freescale.com>
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由 Shaohui Xie 提交于
Lane muxing on p2041 is controlled by a reg in CPLD, offset of this reg is 0xc, CPLD supports SATA by default, we should re-configure the lane muxing according to RCW, which indicates what SerDes protocol it is running. Default lane muxing map is as below: Lane G on bank1 routes to SGMII, controlled by bit 1 of the reg; Lane A on bank2 routes to AURORA, controlled by bit 0 of the reg; Lane C/D on bank2 routes to SATA0 and SATA1, controlled by bit 2 and bit 3 respectively. Default value of these bits for lane muxing is '1', we should set or clear these bits accoring to RCW. Signed-off-by: NShaohui Xie <Shaohui.Xie@freescale.com> Acked-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NAndy Fleming <afleming@freescale.com>
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由 Shaohui Xie 提交于
fsl_ddr_get_dimm_params() should be wrapped by CONFIG_SYS_DDR_RAW_TIMING, otherwise, when using fixed_sdram() instead of using SPD, it will cause compile error. Signed-off-by: NShaohui Xie <Shaohui.Xie@freescale.com> Acked-by: NYork Sun <yorksun@freescale.com> Signed-off-by: NAndy Fleming <afleming@freescale.com>
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由 Shaohui Xie 提交于
ENV location compile logic is wrong, and when CONFIG_SYS_NO_FLASH is defined and non-NOR u-boot is building, it will cause compile error. Also, add CONFIG_SYS_FLASH_USE_BUFFER_WRITE for p2041, which will improve NOR flash write performance. Signed-off-by: NShaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: NAndy Fleming <afleming@freescale.com>
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由 York Sun 提交于
The fix for errata workaround is to avoid covering physical address 0xff000000 to 0xffffffff during the implementation. Early commit eb672e92 works until DDR size exceeds 4GB. This fix works for DDR size up to 64GB. Signed-off-by: NYork Sun <yorksun@freescale.com> Signed-off-by: NAndy Fleming <afleming@freescale.com>
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由 Timur Tabi 提交于
In order for indirect mode on the PIXIS to work properly, both chip selects need to be set to GPCM mode, otherwise writes to the chip select base addresses will not actually post to the local bus -- they'll go to the NAND controller instead. Therefore, we need to set BR0 and BR1 to GPCM mode before switching to indirect mode. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NAndy Fleming <afleming@freescale.com>
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由 Matthew McClintock 提交于
Add TLB mappings, board target options, and configuration items need for SPI/SD boot. Since P1022DS RevB board, the NOR flash have been changed to 16 bit/28bit address flash, therefore, when SDHC/ESPI booting and access to eLBC, the PMUXCR[0~1] must be set to 10b, and PMUXCR[9~10] must be set to 00b for them. Configure the PX_BRDCFG0[0~1] to 10b which is connected to SPI devices as SPI_CS(0:3)_B. Signed-off-by: NMatthew McClintock <msm@freescale.com> Signed-off-by: NJerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: NJiang Yutang <b14898@freescale.com> Signed-off-by: NAndy Fleming <afleming@freescale.com>
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- 08 8月, 2012 4 次提交
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由 Nobuhiro Iwamatsu 提交于
Renesas SH and R-Mobile set up device using PFC. This provide the framework. Most codes were brought from linux kernel. Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Hideyuki Sano 提交于
The serial device of R8A7740 has the same structure as SH7372 of SH, etc. Signed-off-by: NHideyuki Sano <hideyuki.sano.dn@renesas.com> Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Nobuhiro Iwamatsu 提交于
The serial device of SH73A0 has the same structure as SH7372 of SH, etc. Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Yoshihiro Shimoda 提交于
Even if using CPU is SH-4A, the previous code always put "SH4". This patch fixes it. Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
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