1. 27 9月, 2016 1 次提交
  2. 20 9月, 2016 1 次提交
  3. 17 9月, 2016 1 次提交
  4. 10 9月, 2016 2 次提交
  5. 09 9月, 2016 1 次提交
  6. 07 9月, 2016 1 次提交
  7. 08 8月, 2016 1 次提交
  8. 10 6月, 2016 1 次提交
  9. 02 6月, 2016 1 次提交
  10. 17 5月, 2016 1 次提交
  11. 26 4月, 2016 3 次提交
  12. 20 4月, 2016 3 次提交
  13. 10 4月, 2016 1 次提交
  14. 26 3月, 2016 1 次提交
  15. 15 3月, 2016 2 次提交
    • S
      Kconfig: Move CONFIG_FIT and related options to Kconfig · 73223f0e
      Simon Glass 提交于
      There are already two FIT options in Kconfig but the CONFIG options are
      still in the header files. We need to do a proper move to fix this.
      
      Move these options to Kconfig and tidy up board configuration:
      
         CONFIG_FIT
         CONFIG_OF_BOARD_SETUP
         CONFIG_OF_SYSTEM_SETUP
         CONFIG_FIT_SIGNATURE
         CONFIG_FIT_BEST_MATCH
         CONFIG_FIT_VERBOSE
         CONFIG_OF_STDOUT_VIA_ALIAS
         CONFIG_RSA
      
      Unfortunately the first one is a little complicated. We need to make sure
      this option is not enabled in SPL by this change. Also this option is
      enabled automatically in the host builds by defining CONFIG_FIT in the
      image.h file. To solve this, add a new IMAGE_USE_FIT #define which can
      be used in files that are built on the host but must also build for U-Boot
      and SPL.
      
      Note: Masahiro's moveconfig.py script is amazing.
      Signed-off-by: NSimon Glass <sjg@chromium.org>
      [trini: Add microblaze change, various configs/ re-applies]
      Signed-off-by: NTom Rini <trini@konsulko.com>
      73223f0e
    • S
      Correct defconfig ordering · 4edb9458
      Simon Glass 提交于
      Various boards have the wrong Kconfig ordering now. To avoid a misleading
      
      diff in the next patch, reorder the configuration correctly.
      Signed-off-by: NSimon Glass <sjg@chromium.org>
      4edb9458
  16. 20 12月, 2015 1 次提交
    • M
      arm: socfpga: de0_nano: Probe DWC2 UDC from OF instead of hard-coded data · 5b5226a8
      Marek Vasut 提交于
      This patch adds the necessary OF alias for the UDC node, which let's
      the code locate the DWC2 UDC base address in OF instead of hard-coding
      it into the U-Boot binary. The code is adjusted to use the address from
      OF instead of the hard-coded one. Finally, the hard-coded address is
      removed and USB DM support is enabled.
      Signed-off-by: NMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
      Cc: Lukasz Majewski <l.majewski@majess.pl>
      Cc: Lukasz Majewski <l.majewski@samsung.com>
      5b5226a8
  17. 07 12月, 2015 1 次提交
    • M
      arm: socfpga: Enable CONFIG_DM_MMC · 540fcbca
      Marek Vasut 提交于
      Enable driver model MMC support on SoCFPGA.
      Signed-off-by: NMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
      Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
      Cc: Simon Glass <sjg@chromium.org>
      Cc: Tom Rini <trini@konsulko.com>
      540fcbca
  18. 25 11月, 2015 1 次提交
  19. 22 11月, 2015 1 次提交
  20. 19 11月, 2015 1 次提交
  21. 28 9月, 2015 1 次提交
  22. 04 9月, 2015 3 次提交
  23. 23 8月, 2015 2 次提交
    • M
      arm: socfpga: Enable DWAPB GPIO driver · 1bd57ff5
      Marek Vasut 提交于
      Enable the DWAPB GPIO driver for SoCFPGA Cyclone V and Arria V.
      Signed-off-by: NMarek Vasut <marex@denx.de>
      Cc: Simon Glass <sjg@chromium.org>
      Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
      1bd57ff5
    • M
      arm: socfpga: Unbind CPU type from board type · cd9b7317
      Marek Vasut 提交于
      The CONFIG_TARGET_SOCFPGA_CYCLONE5 and CONFIG_TARGET_SOCFPGA_ARRIA5
      selected both a board and a CPU. This is not correct as these macros
      are supposed to select only board.
      
      All would be good, if QTS-generated header files didn't check for
      these macros exactly to determine if the platform is Cyclone V or
      Arria V. Thus, for the sake of compatibility with not well fleshed
      out header file generator, this patch makes these two macros into
      a stub config option and introduces new CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK
      and CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK targets, which select the
      previous stub config option.
      
      The result is that compatibility with QTS is preserved and the new
      CONFIG_TARGET_* select actual target boards.
      Signed-off-by: NMarek Vasut <marex@denx.de>
      cd9b7317
  24. 22 8月, 2015 1 次提交
  25. 19 8月, 2015 1 次提交
  26. 08 8月, 2015 4 次提交
  27. 26 6月, 2015 2 次提交