1. 07 9月, 2007 5 次提交
  2. 06 9月, 2007 3 次提交
  3. 05 9月, 2007 2 次提交
  4. 02 9月, 2007 1 次提交
  5. 31 8月, 2007 2 次提交
    • G
      ppc4xx: (Re-)Enable CONFIG_PCI_PNP on AMCC 440EPx Sequoia · 81b73dec
      Gary Jennejohn 提交于
      The 440EPx has a problem when the PCI_CACHE_LINE_SIZE register is
      set to non-zero, because it doesn't support MRM (memory-read-
      multiple) correctly. We now added the possibility to configure
      this register in the board config file, so that the default value
      of 8 can be overridden.
      
      Here the details of this patch:
      
      o drivers_pci_auto.c: introduce CFG_PCI_CACHE_LINE_SIZE to allow
        board-specific settings. As an example the sequoia board requires 0.
        Idea from Stefan Roese <sr@denx.de>.
      o board/amcc/sequoia/init.S: add a TLB mapping at 0xE8000000 for the
        PCI IO-space. Obtained from Stefan Roese <sr@denx.de>.
      o include/configs/sequoia.h: turn CONFIG_PCI_PNP back on and set
        CFG_PCI_CACHE_LINE_SIZE to 0.
      Signed-off-by: NGary Jennejohn <garyj@denx.de>
      Signed-off-by: NStefan Roese <sr@denx.de>
      81b73dec
    • W
      Fix TFTP OACK code for short packets. · 60174746
      Wolfgang Denk 提交于
      The old code had a loop limit overflow bug which caused a semi-
      infinite loop for small packets, because in "i<len-8", "i" was signed,
      but "len" was unsigned, and "len-8" became a huge number for small
      values of "len".
      
      This is a workaround which replaces broken commit 8f1bc284.
      Signed-off-by: NWolfgang Denk <wd@denx.de>
      60174746
  6. 30 8月, 2007 3 次提交
  7. 29 8月, 2007 18 次提交
  8. 28 8月, 2007 2 次提交
  9. 25 8月, 2007 1 次提交
  10. 24 8月, 2007 2 次提交
  11. 23 8月, 2007 1 次提交
    • S
      ppc4xx: Add support for 2nd I2C EEPROM on lwmon5 board · c25dd8fc
      Stefan Roese 提交于
      This patch adds support for the 2nd EEPROM (AT24C128) on the lwmon5
      board. Now the "eeprom" command can be used to read/write from/to this
      device. Additionally a new command was added "eepromwp" to en-/disable
      the write-protect of this 2nd EEPROM.
      
      The 1st EEPROM is not affected by this write-protect command.
      Signed-off-by: NStefan Roese <sr@denx.de>
      c25dd8fc