Add a test to confirm that we can probe this device. Since there is no
MMC stack support in sandbox at present, this is as far as the test goes.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Add a test to confirm that we can probe this device and get information on
the available RAM.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Add tests that confirm that the drivers work as expected, and we can walk
through the available reset types trying to reset the board.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Move sandbox over to use the reset uclass for reset, instead of a direct
call to do_reset(). This allows us to add tests.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Add drivers for sandbox. One can only perform a warm reset (which does
nothing). The other can perform a cold reset or a power reset (the
latter will quit U-Boot). These can be used for testing the reset uclass.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Add a new reset_walk_halt() function to cause a reset and then halt on
failure. The reset_walk() function returns an error code.

This is needed for testing since otherwise U-Boot will halt in the middle
of a test.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Add settings for the last reset generated, and the types of resets which
are permitted. This will be used for testing.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Add tests of each API call using a sandbox clock device.
Signed-off-by: NSimon Glass <sjg@chromium.org>

All driver model tests have a dm_test_ prefix. Ignore it when matching a
test name. This makes it easier to run individual tests, like this:

   ./sandbox/u-boot -d ./sandbox/arch/sandbox/dts/test.dtb \
	-c "ut dm clk_periph"

We can use 'clk_periph' instead of 'dm_test_clk_periph'.

Also print a message if the requested test is not found.
Signed-off-by: NSimon Glass <sjg@chromium.org>

We should guide people more strongly towards device tree to avoid the
proliferation of platform data structures. Add documentation to the driver
model README, and also the platform data header file.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Use the common function to obtain the number from the end of the string,
instead of a local function. Also tweak the position of a debug() statement.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Tested-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Acked-by: NPrzemyslaw Marczak <p.marczak@samsung.com>

Clocks are an important feature of platforms and have become increasing
complex with time. Most modern SoCs have multiple PLLs and dozens of clock
dividers which distribute clocks to on-chip peripherals.

Some SoC implementations have a clock API which is private to that SoC family,
e.g. Tegra and Exynos. This is useful but it would be better to have a
common API that can be understood and used throughout U-Boot.

Add a simple clock API as a starting point. It supports querying and setting
the rate of a clock. Each clock is a device. To reduce memory and processing
overhead the concept of peripheral clocks is provided. These do not need to
be explicit devices - it is possible to write a driver that can adjust the
I2C clock (for example) without an explicit I2C clock device. This can
dramatically reduce the number of devices (and associated overhead) in a
complex SoC.

Clocks are referenced by a number, and it is expected that SoCs will define
that numbering themselves via an enum.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Since we want clk_ops to be used in U-Boot as a whole, rename the Zynq
version until it can be converted to driver model.
Signed-off-by: NSimon Glass <sjg@chromium.org>

It is common for system reset to be available at multiple levels in modern
hardware. For example, an SoC may provide a reset option, and a board may
provide its own reset for reasons of security or thoroughness. It is useful
to be able to model this hardware without hard-coding the behaviour in the
SoC or board. Also there is a distinction sometimes between resetting just
the CPU (leaving GPIO state alone) and resetting all the PMICs, just cutting
power.

To achieve this, add a simple system reset uclass. It allows multiple devices
to provide reset functionality and provides a way to walk through them,
requesting a particular reset type until is it provided.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Some functions called by mkimage would like to know the output file size.
Initially this is the same as the input file size, but it may be affected by
adding headers, etc.

Add this information to the image parameters.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

As a debug option, add positive confirmation that SPL has completed
execution. This can help with diagnosing the location of unexpected hangs.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Add an spl_init() function that does basic init such that board_init_f() can
use simple malloc(), device tree and driver model. Each one is set up only
if enabled for SPL.

Note: We really should refactor SPL such that there is a single
board_init_f() and rename the existing weak board_init_f() functions
provided by boards, calling them from the single board_init_f().
Signed-off-by: NSimon Glass <sjg@chromium.org>

It can be quite confusing with a new platform to figure out why the device
tree cannot be located. Add some debug information for this case.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Split out the code in fdtdec which finds a number at the end of a string. It
can be useful in other situations.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Add an implementation of RC4. This will be used by Rockchip booting but may
be useful in other situations.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Since Rockchip requires 32-bit serial access, add this to the driver.
Refactor a little to make this easier.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Several functions in this file should be marked as static. Update them.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Add support for a driver which sets up DRAM and can return information about
the amount of RAM available. This is a first step towards moving RAM init
to driver model.
Signed-off-by: NSimon Glass <sjg@chromium.org>

This bloats the code size quite a bit and is less useful in SPL where there
is no command line.

Avoid including this code in SPL.
Signed-off-by: NSimon Glass <sjg@chromium.org>

This functionality may be useful for setting up regulators early during
boot.
Signed-off-by: NSimon Glass <sjg@chromium.org>

It is a common requirement to update some PMIC registers. Provide some
simple convenience functions to do this.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Tested-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Acked-by: NPrzemyslaw Marczak <p.marczak@samsung.com>

To reduce unnecessary code size in an uncommon code path, use debug()
where possible(). The driver returns an error which indicates failure.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Tested-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Acked-by: NPrzemyslaw Marczak <p.marczak@samsung.com>

The device tree provides information about which regulators should be
on at boot, or always on. Use this to set them up automatically.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Tested-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Acked-by: NPrzemyslaw Marczak <p.marczak@samsung.com>

The regulator_autoset() function mixes printf() output and PMIC adjustment
code. It provides a boolean to control the output. It is better to avoid
missing logic and output, and this permits a smaller SPL code size. So
split the output into a separate function.

Also rename the function to have a by_name() suffix, since we would like
to be able to pass a device when we know it, and thus avoid the name
search.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Tested-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Acked-by: NPrzemyslaw Marczak <p.marczak@samsung.com>

Decide when the regulator is set up whether we want to auto-set the voltage
or current. This avoids the complex logic spilling into the processing code.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Tested-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Acked-by: NPrzemyslaw Marczak <p.marczak@samsung.com>

This is not user input (i.e. from the command line). It should be possible
to get the case correct and avoid the case-insensitive match. This will
help avoid sloppy device tree setups.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Tested-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Acked-by: NPrzemyslaw Marczak <p.marczak@samsung.com>

It took a little while to figure this out, so this patch adds documentation
to help the next person who needs to do this.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Enable MMC using driver model in SPL for consistency with U-Boot proper.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Allow read errors to be diagnosed more easily.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Add basic support for MMC, providing a uclass which can set up an MMC
device. This allows MMC drivers to move to using driver model.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Add a few messages to indicate progress and failure.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Add a simple driver which allows use of LEDs attached to GPIOs. The linux
device tree binding is used.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Add a simple uclass for LEDs, so that these can be controlled by the device
tree and activated when needed. LEDs are referred to by their label.

This implementation requires a driver for each type of LED (e.g GPIO, I2C).
Signed-off-by: NSimon Glass <sjg@chromium.org>

Many SoCs have a number of system controllers which are dealt with as a
group by a single driver. It is a pain to have to add lots of compatible
strings and/or separate drivers for each. Instead we can identify the
controllers by a number and request the address of the one we want.

Add a simple implementation of this which can be used by SoC driver code.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Add a simple implementaton of register maps, supporting only direct I/O
for now. This can be enhanced later to support buses which have registers,
such as I2C, SPI and PCI.

It allows drivers which can operate with multiple buses to avoid dealing
with the particulars of register access on that bus.
Signed-off-by: NSimon Glass <sjg@chromium.org>