- 11 6月, 2008 1 次提交
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由 Kumar Gala 提交于
Make it so we keep track of which LAWs have allocated and provide a function (set_next_law) which can allocate a LAW for us if one is free. In the future we will move to doing more "dynamic" LAW allocation since the majority of users dont really care about what LAW number they are at. Also, add CONFIG_MPC8540 or CONFIG_MPC8560 to those boards which needed them Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NAndy Fleming <afleming@freescale.com>
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- 21 5月, 2008 1 次提交
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由 Wolfgang Denk 提交于
This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: NWolfgang Denk <wd@denx.de>
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- 27 3月, 2008 1 次提交
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由 Kumar Gala 提交于
When we go to 36-bit physical addresses we need to keep the concept of the physical CCSRBAR address seperate from the virtual one. For the majority of boards CFG_CCSBAR_PHYS == CFG_CCSRBAR Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 17 1月, 2008 3 次提交
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由 Kumar Gala 提交于
Now that all boards have been converted, remove old config code and the config option for the new style. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 10 1月, 2008 1 次提交
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由 Kumar Gala 提交于
Either use the standard defines in asm/cache.h or grab the information at runtime from the L1CFG SPR. Also, minor cleanup in cache.h to make the code a bit more readable. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 17 8月, 2007 1 次提交
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由 Andy Fleming 提交于
The 85xx code now relies on CONFIG_HAS_ETH0 to determine whether to update TSEC1's device-tree node, so we need to add it to all the boards with TSECs. Do this for 83xx and 86xx, too, since they will eventually do something similar. Signed-off-by: NAndy Fleming <afleming@freescale.com>
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- 16 8月, 2007 1 次提交
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由 Andy Fleming 提交于
The tsec_info structure and array has a "flags" field for each ethernet controller. This field is the only reason there are settings. Switch to defining TSECn_FLAGS for each controller in the config header, and we can greatly simplify the array, and also simplify the addition of future boards. Signed-off-by: NAndy Fleming <afleming@freescale.com>
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- 10 7月, 2007 1 次提交
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由 Jon Loeliger 提交于
Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h used to be included but CONFIG_BOOTP_MASK was not defined. Remove lingering references to CFG_CMD_* symbols. Signed-off-by: NJon Loeliger <jdl@freescale.com>
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- 05 7月, 2007 1 次提交
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由 Jon Loeliger 提交于
Signed-off-by: NJon Loeliger <jdl@freescale.com>
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- 17 5月, 2007 1 次提交
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由 Kim Phillips 提交于
For all practical u-boot purposes, TSECs don't differ throughout the mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx. Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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- 21 10月, 2006 1 次提交
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由 Jon Loeliger 提交于
Introduced COFIG_FSL_I2C to select the common FSL I2C driver. And removed hard i2c path from a few u-boot.lds scipts too. Minor whitespace cleanups along the way. Signed-off-by: NJon Loeliger <jdl@freescale.com>
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- 26 7月, 2005 1 次提交
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由 Jon Loeliger 提交于
Implemented support for MPC8548CDS board. Added DDR II support based on SPD values for MPC85xx boards. This roll-up patch also includes bugfies for the previously published patches: DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O
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- 23 7月, 2005 1 次提交
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由 Jon Loeliger 提交于
- Convert the CPM2 based functionality to use new CONFIG_CPM2 option rather than a myriad of CONFIG_MPC8560-like variants. Applies to MPC85xx and MPC8260 boards, includes stxgp3 and sbc8560. Eliminates the CONFIG_MPC8560 option entirely. Distributes the new CONFIG_CPM2 option to each 8260 board.
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- 31 12月, 2004 1 次提交
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由 wdenk 提交于
* Cleanup confusing use of CONFIG_ETH*ADDR - ust his only to pre-define a MAC address; use CONFIG_HAS_ETH* to enable support for additional ethernet addresses. * Cleanup drivers/i82365.c - avoid duplication of code * Fix bogus "cannot span across banks" flash error message * Add support for CompactFlash for the CPC45 Board.
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- 02 8月, 2004 1 次提交
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由 wdenk 提交于
- support larger DDR memories up to 2G on the PC8540/8560ADS and STXGP3 boards - Made MPC8540/8560ADS be 33Mhz PCI by default. - Removed moldy CONFIG_RAM_AS_FLASH, CFG_FLASH_PORT_WIDTH_16 and CONFIG_L2_INIT_RAM options. - Refactor Local Bus initialization out of SDRAM setup. - Re-implement new version of LBC11/DDR11 errata workarounds. - Moved board specific PCI init parts out of CPU directory. - Added TLB entry for PCI-1 IO Memory - Updated README.mpc85xxads
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- 19 4月, 2004 1 次提交
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由 wdenk 提交于
- Add support for RPC/STx GP3, Motorola 8560 board - Update 85xx TSEC driver so it searches MII for first available PHY and uses that one. - Add functions to support console MII commands. * Patch by Tolunay Orkun, 07 Apr 2004: Move initialization of bi_iic_fast[] from board_init_f() to board_init_r() * Patch by Yasushi Shoji, 07 Apr 2004: Cleanup microblaze port * Patch by Sangmoon Kim, 07 Apr 2004: Add auto SDRAM module detection for Debris board
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- 21 1月, 2004 1 次提交
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由 wdenk 提交于
before we can access it; add delay in case we are faster (with no CF card inserted) * Cleanup of some init functions * Make sure SCC Ethernet is always stopped by the time we boot Linux to avoid Linux crashes by early packets coming in. * Accelerate flash accesses on LWMON board by using buffered writes
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- 16 10月, 2003 1 次提交
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由 wdenk 提交于
- Added Motorola CPU 8540/8560 support (cpu/85xx) - Added Motorola MPC8540ADS board support (board/mpc8540ads) - Added Motorola MPC8560ADS board support (board/mpc8560ads) * Minor code cleanup
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