- 30 3月, 2008 3 次提交
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由 Sascha Hauer 提交于
Move omap24xx code to cpu/arm1136/omap24xx, rename include/asm-arm/arch-arm1136 to cpu/arm1136/omap24xx. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NGuennadi Liakhovetski <lg@denx.de>
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由 Pieter Voorthuijsen 提交于
Signed-off-by: NPieter Voorthuijsen <pv@prodrive.nl>
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由 Pieter Voorthuijsen 提交于
Signed-off-by: NPieter Voorthuijsen <pv@prodrive.nl>
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- 28 3月, 2008 1 次提交
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由 Bartlomiej Sieka 提交于
Revert commit 87c8431f and fix build breakage so that the build continues to work on FC systems. Signed-off-by: NBartlomiej Sieka <tur@semihalf.com>
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- 27 3月, 2008 18 次提交
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由 Haavard Skinnemoen 提交于
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
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由 Anatolij Gustschin 提交于
This patch fixes compilation error cmd_usb.c: In function 'do_usb': cmd_usb.c:552: error: void value not ignored as it ought to be Signed-off-by: NAnatolij Gustschin <agust@denx.de>
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由 Wolfgang Denk 提交于
Signed-off-by: NWolfgang Denk <wd@denx.de>
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由 Dave Liu 提交于
Signed-off-by: NDave Liu <daveliu@freescale.com>
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由 Dave Liu 提交于
add simple libata support in u-boot Signed-off-by: NDave Liu <daveliu@freescale.com>
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由 Dave Liu 提交于
original ata_piix driver is using IDE framework, not real SATA framework. For now, the ata_piix driver is only used by x86 sc520_cdp board. This patch makes the ata_piix driver use the new SATA framework, so - remove the duplicated command stuff - remove the CONFIG_CMD_IDE define in the sc520_cdp.h - add the CONFIG_CMD_SATA define to sc520_cdp.h Signed-off-by: NDave Liu <daveliu@freescale.com>
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由 Dave Liu 提交于
- add the SATA framework - add the SATA command line Signed-off-by: NDave Liu <daveliu@freescale.com>
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由 Dave Liu 提交于
move the sata.h from include/ to drivers/block/ata_piix.h Signed-off-by: NDave Liu <daveliu@freescale.com>
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由 Dave Liu 提交于
move the cmd_sata.c from common/ to drivers/ata_piix.c, the cmd_sata.c have some part of ata_piix controller drivers. consolidate the driver to have better framework. Signed-off-by: NDave Liu <daveliu@freescale.com>
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由 Anatolij Gustschin 提交于
This patch fixes compilation error cmd_usb.c: In function 'do_usb': cmd_usb.c:552: error: void value not ignored as it ought to be Signed-off-by: NAnatolij Gustschin <agust@denx.de> Signed-off-by: NMarkus Klotzbuecher <mk@denx.de>
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由 Kumar Gala 提交于
The following changes are needed to be inline with ePAPR v0.81: * r4, r5 and now always set to 0 on boot release * r7 is used to pass the size of the initial map area (IMA) * EPAPR_MAGIC value changed for book-e processors * changes in the spin table layout * spin table supports a 64-bit physical release address Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Jon Loeliger 提交于
Each file that can be built here now follows some CONFIG_ option so that they are appropriately built or not, as needed. And CONFIG_ defines were added to various board config files to make sure that happens. The other board/freescale/*/Makefiles no longer need to reach up and over into ../common to build their individually needed files any more. Boards that are CDS specific were renamed with cds_ prefix. Signed-off-by: NJon Loeliger <jdl@freescale.com>
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由 James Yang 提交于
Signed-off-by: NJames Yang <James.Yang@freescale.com> Signed-off-by: NJon Loeliger <jdl@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 James Yang 提交于
get_ddr_freq() and get_bus_freq() used get_sys_info() each time they were called. However, get_sys_info() recalculates extraneous information when called each time. Have get_ddr_freq() and get_bus_freq() return memoized values from global_data instead. Signed-off-by: NJames Yang <James.Yang@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Andy Fleming 提交于
FSL has taken to using SVR[16:23] as an SOC sub-version field. This is used to distinguish certain variants within an SOC family. To account for this, we add the SVR_SOC_VER() macro, and update the SVR_* constants to reflect the larger value. We also add SVR numbers for all of the current variants. Finally, to make things neater, rather than use an enormous switch statement to print out the CPU type, we create and array of SVR/name pairs (using a macro), and print out the CPU name that matches the SVR SOC version. Signed-off-by: NAndy Fleming <afleming@freescale.com>
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由 Andy Fleming 提交于
Signed-off-by: NAndy Fleming <afleming@freescale.com>
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由 Kumar Gala 提交于
Added the cpu command that provides a generic mechanism to get status, reset, and release secondary cores in multicore processors. Added support for using the ePAPR defined spin-table mechanism on 85xx. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
When we go to 36-bit physical addresses we need to keep the concept of the physical CCSRBAR address seperate from the virtual one. For the majority of boards CFG_CCSBAR_PHYS == CFG_CCSRBAR Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 26 3月, 2008 18 次提交
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由 Wolfgang Denk 提交于
Signed-off-by: NWolfgang Denk <wd@denx.de>
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由 Anton Vorontsov 提交于
Linux understands "host" (default), "peripheral" and "otg" (broken). Though, U-Boot doesn't restrict dr_mode variable to these values (think of renames in future). Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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由 Joe D'Abbraccio 提交于
With the original value of 1/2 clock cycle delay, the system ran relatively stable except when we run benchmarks that are intensive users of memory. When I run samba connected disk with a HDBENCH test, the system locks-up or reboots sporadically. Signed-off by: Joe D'Abbraccio <Joe.D'abbraccio@freescale.com>
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由 Scott Wood 提交于
The device trees for these boards describe PCI I/O as starting from address zero from the device's perspective. Placing I/O elsewhere may cause problems with certain PCI boards, and may cause problems with Linux. Signed-off-by: NScott Wood <scottwood@freescale.com>
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由 Anton Vorontsov 提交于
At least on the "33MHz Pilot" board crystal is actually 33.3MHz. This patch fixes "system time drifting" problem. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Anton Vorontsov 提交于
This is needed to update /choosen/linux,stdout-path properly. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Anton Vorontsov 提交于
Plus modify environment to use it and remove bootfile env variable, it is internal and CONFIG_BOOTFILE is used for these purposes. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Anton Vorontsov 提交于
Current DDR setup easily causes memory corruption, this patch fixes it. Also fix TIMING_CFG0_MRS_CYC definition. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Anton Vorontsov 提交于
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Anton Vorontsov 提交于
This is needed for BCM PHYs to work on this board. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Anton Vorontsov 提交于
This is primarily for the early console support. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Anton Vorontsov 提交于
On the MPC8377ERDB: 2 SATA and 2 PCI-E. On the MPC8378ERDB: 2 PCI-E On the MPC8379ERDB: 4 SATA Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Anton Vorontsov 提交于
This patch adds few routines to configure serdes on 837x targets. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Anton Vorontsov 提交于
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Jerry Van Baren 提交于
Signed-off-by: NGerald Van Baren <vanbaren@cideas.com> Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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由 Michael Barkowski 提交于
There's no on-board RTC on the MPC8323ERDB, but there is an EEPROM. Signed-off-by: NMichael Barkowski <michael.barkowski@freescale.com> Acked-by: NKim Phillips <kim.phillips@freescale.com>
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由 Michael Barkowski 提交于
The following changes are based on kernel UCC ethernet performance: 1. Make the CSB bus pipeline depth as 4, and enable the repeat mode 2. Optimize transactions between QE and CSB. Added CFG_SPCR_OPT switch to enable this setting. The following changes are based on the App Note AN3369 and verified to improve memory latency using LMbench: 3. CS0_CONFIG[AP_n_EN] is changed from 1 to 0 4. CS0_CONFIG[ODT_WR_CONFIG] set to 1. Was a reserved setting previously. 5. TIMING_CFG_1[WRREC] is changed from 3clks to 2clks (based on Twr=15ns, and this was already the setting in DDR_MODE) 6. TIMING_CFG_1[PRETOACT] is changed from 3clks to 2clks. (based on Trp=15ns) 7. TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 6clks. (based on Tras=40ns) 8. TIMING_CFG_1[ACTTORW] is changed from 3clks to 2clks. (based on Trcd=15ns) 9. TIMING_CFG_1[REFREC] changed from 21 clks to 11clks. (based on Trfc=75ns) 10. TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 7clks. (based on Tfaw=50ns) 11. TIMING_CFG_2[ADD_LAT] and DDR_MODE[AL] changed from 0 to 1 (based on CL=3 and WL=2). Signed-off-by: NMichael Barkowski <michael.barkowski@freescale.com> Acked-by: NKim Phillips <kim.phillips@freescale.com>
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由 Michael Barkowski 提交于
Use available shift/mask macros to define DDR configuration. Signed-off-by: NMichael Barkowski <michael.barkowski@freescale.com> Acked-by: NKim Phillips <kim.phillips@freescale.com>
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