- 14 10月, 2009 4 次提交
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由 Minkyu Kang 提交于
Adds new board SMDKC100 that uses s5pc100 SoC Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com> Signed-off-by: NHeungJun, Kim <riverful.kim@samsung.com>
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由 Minkyu Kang 提交于
This patch includes the serial driver for s5pc1xx. s5pc1xx uart driver needs own register setting and clock configuration. So, need to special driver. Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Minkyu Kang 提交于
This patch includes the onenand driver for s5pc100 Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
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由 Minkyu Kang 提交于
This patch adds support for the Samsung s5pc100 and s5pc110 SoCs. The s5pc1xx SoC is an ARM Cortex A8 processor. Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com> Signed-off-by: NHeungJun, Kim <riverful.kim@samsung.com>
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- 13 10月, 2009 24 次提交
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由 Daniel Gorsulowski 提交于
This patch implements several updates: -disable CONFIG_ENV_OVERWRITE -add new hardware style variants and set the arch numbers appropriate -pass the serial# and hardware revision to the kernel -removed unused macros from include/configs/meesc.h -fixed multiline comment style Signed-off-by: NDaniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
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由 Simon Kagstrom 提交于
FLAG_PARSE_SEMICOLON is not defined without hush.h, so include that. Signed-off-by: NSimon Kagstrom <simon.kagstrom@netinsight.net> Signed-off-by: NPrafulla Wadaskar <prafulla@marvell.com>
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由 Olof Johansson 提交于
Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded over tftp. This also refactors the smc911x driver to allow for detecting when the chip is missing. I.e. the detect_chip() function is called earlier and will abort gracefully when the Chip ID read returns all 1's. Signed-off-by: NOlof Johansson <olof@lixom.net> Acked-by: NDirk Behme <dirk.behme@googlemail.com> Acked-by: NBen Warren <biggerbadderben@gmail.com>
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由 Olof Johansson 提交于
Refactor the smc911x driver to allow for detecting when the chip is missing. I.e. the detect_chip() function is called earlier and will abort gracefully when the Chip ID read returns all 1's. Signed-off-by: NOlof Johansson <olof@lixom.net> Acked-by: NDirk Behme <dirk.behme@googlemail.com> Acked-by: NBen Warren <biggerbadderben@gmail.com>
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由 Tom Rix 提交于
This changes fixes an early i2c error. It appears that I2C is working because once a read or write error is detected, the omap24xx_i2c driver calls i2c_init inside its error handling check. While it is ok to attempt error handling this way, the boards must not depend on this side effect to initialize it's i2c. Instead of explicitly calling i2c_init for every board, use the generic arm initialization in lib_arm/board.c. By defining the config variable CONFIG_HARD_I2C, the omap3 i2c initialization is included in the init_sequence table. Run tested on Beagle. Compile tested on the omap3's Signed-off-by: NTom Rix <Tom.Rix@windriver.com> Acked-by: NDirk Behme <dirk.behme@googlemail.com>
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由 Sandeep Paulraj 提交于
This patch enables EMAC on the DM365 EVM. Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com> Acked-by: NTom Rix <Tom.Rix@windriver.com>
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由 Sandeep Paulraj 提交于
Some DaVinci SOC's use GPIOs to enable EMAC and DM9000. This patch adds some definitions for GPIO registers and also adds structures for GPIO. A separate header file is being added so that in future we can have a DaVinci GPIO driver similer to OMAP. Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com> Acked-by: NTom Rix <Tom.Rix@windriver.com>
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由 Sandeep Paulraj 提交于
In the DaVinci specific code, we use both CONFIG_SOC_DM646X and CONFIG_SOC_DM646x to represent DM646x specific code. This patch changes occurrences of CONFIG_SOC_DM646x to CONFIG_SOC_DM646X. This is because for DM644x series of SOCs we use the flag CONFIG_SOC_DM644X. We want some uniformity. Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com> Acked-by: NTom Rix <Tom.Rix@windriver.com>
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由 Olof Johansson 提交于
Switch from space-based indentation to tab-based in mux configs, as pointed out by WD at: http://lists.denx.de/pipermail/u-boot/2009-September/061241.html Nothing but whitespace changes in this patch (diff -w gives no output). Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Dirk Behme 提交于
Fix warning Dereferencing type-punned pointer will break strict-aliasing rules Signed-off-by: NDirk Behme <dirk.behme@googlemail.com> CC: Steve Sakoman <sakoman@gmail.com> Acked-by: NTom Rix <Tom.Rix@windriver.com>
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由 Simon Kagstrom 提交于
The implementation is borrowed from the sheevaplug board and the Marvell 1.1.4 code. Unsupported (or untested) is the SD card, PCIe and SATA. Signed-off-by: NSimon Kagstrom <simon.kagstrom@netinsight.net>
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由 Prafulla Wadaskar 提交于
This patch adds kwbimage configuration file (used by mkimage utility) to support u-boot.kwb target on mv88f6281gtw_ge board. To create Kirkwood boot image to be flashed on SPI Flash, additional parameter u-boot.kwb need to be passed during make. Signed-off-by: NPrafulla Wadaskar <prafulla@marvell.com>
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由 Prafulla Wadaskar 提交于
This patch adds kwbimage configuration file (used by mkimage utility) to support u-boot.kwb target on rd6281a platform. To create Kirkwood boot image to be flashed on NAND, additional parameter u-boot.kwb need to be passed during make. Signed-off-by: NPrafulla Wadaskar <prafulla@marvell.com>
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由 Tom Rix 提交于
these boards are built around Atmel's AT91SAM9260/9G20 and have up to 64MB of NOR flash, up to 128MB of SDRAM, up to 2GB of NAND and include a 10/100 Ethernet PHY in RMII mode. Signed-off-by: NEric Benard <eric@eukrea.com> Signed-off-by: NTom Rix <Tom.Rix@windriver.com>
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由 Tom Rix 提交于
CPUAT91 is built around Atmel's AT91RM9200 and has up to 16MB of NOR flash, up to 128MB of SDRAM, and includes a Micrel KS8721 PHY in RMII mode. Signed-off-by: NEric Benard <eric@eukrea.com> Signed-off-by: NTom Rix <Tom.Rix@windriver.com>
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由 Sandeep Paulraj 提交于
The DM365 config was using the 'CONFIG_CMD_SAVEENV' flag. This is already included when we include the config_cmd_default.h header file. So this flag is removed. Also another flag to enable NAND functions was being enabled incorrectly. Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>
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由 Sandeep Paulraj 提交于
The DaVinci DM365 EVM board specific code was including a header file which does not exist. So removing this header file. Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>
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由 Sandeep Paulraj 提交于
This patch does the following 1) Enables the NAND driver which is now available. 2) Enables the 'CONFIG_MTD_DEVICE' as without this the compilation will fail 3) We now have a safe place to store environment and defines an offset where this can be stored. This offset value is such that it is after the location where U-Boot is flashed using TI flash utilities. 4) Enables Bootdelay 5) Increases malloc() arena size. Manufacturers are coming out with NAND with large blocks sizes of upto 1 MiB. It has been noticed that as the block size of the NAND used is increased, if this particular value is not increased, the NAND driver will output out of memory errors. Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>
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由 Sandeep Paulraj 提交于
DM646x is an SOC from TI which has both an ARM and a DSP. There are multiple variants of the SOC mainly dealing with different core speeds. This patch adds the initial framework for the DM646x SOC. Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>
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由 Sandeep Paulraj 提交于
The Default mode that is built for the Davinci DVEVM happens to be the NOR mode. When we want to build for the NAND mode, we get a compilation error. This is overcome by defining the CONFIG_MTD_DEVICE flag in the NAND mode. The image built for NAND mode was successfully tested on the DaVinci DM6446 EVM. Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>
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由 Tom Rix 提交于
v7_flush_dcache_all, because it depends on omap ROM code is not generic. Rename the function to 'invalidate_dcache' and move it to the omap cpu directory. Collect the other omap cache routines l2_cache_enable and l2_cache_disable with invalide_dcache into cache.S. This means removing the old cache.c file that contained l2_cache_enable and l2_cache_disable. The conversion from cache.c to cache.S was done most through disassembling the uboot binary. The only significant change was to change the comparision for the return of get_cpu_rev from cmp r0, #0 beq earlier_than_label Which was lost information to cmp r0, #CPU_3XX_ES20 blt earlier_than_label The paths through the enable routine were verified by adding an infinite loop and seeing the hang. Then removing the infinite loop and seeing it continue. The disable routine is similar enough that it was not tested with this method. Run tested by cold booting from nand on beagle and zoom1. Compile tested on MAKEALL arm. Signed-off-by: NTom Rix <Tom.Rix@windriver.com>
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由 Sandeep Paulraj 提交于
This patch removes the asm/sizes.h header file from being included in the DaVinci SOC configs. References to SZ_xx have been replaced by appropriate bit shifted values. Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com> Acked-by: NWolfgang Denk <wd@denx.de>
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由 Wolfgang Denk 提交于
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由 Ed Swarthout 提交于
Forcing the tables into got2 caused extra relocation when using -mrelocatable. This patch requires any board defining CONFIG_BIOSEMU to use -mrelocatable. Signed-off-by: NEd Swarthout <Ed.Swarthout@freescale.com> Acked-by: NJin Zhengxiong <Jason.Jin@freescale.com>
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- 11 10月, 2009 3 次提交
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由 Luigi 'Comio' Mantellini 提交于
Signed-off-by: NLuigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com> Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
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由 Luigi 'Comio' Mantellini 提交于
Signed-off-by: NLuigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com> Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
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由 Luigi 'Comio' Mantellini 提交于
Rewrite the miiphybb (Bit-banged MII bus driver) in order to support an arbitrary number of mii buses. This feature is useful when your board uses different mii buses for different phys and all (or a part) of these buses are implemented via bit-banging mode. The driver requires that the following macros should be defined into the board configuration file: CONFIG_BITBANGMII - Enable the miiphybb driver CONFIG_BITBANGMII_MULTI - Enable the multi bus support If the CONFIG_BITBANGMII_MULTI is not defined, the board's config file needs to define at least the following macros: MII_INIT - Generic code to enable the MII bus (optional) MDIO_DECLARE - Declaration needed to access to the MDIO pin (optional) MDIO_ACTIVE - Activate the MDIO pin as out pin MDIO_TRISTATE - Activate the MDIO pin as input/tristate pin MDIO_READ - Read the MDIO pin MDIO(v) - Write v on the MDIO pin MDC_DECLARE - Declaration needed to access to the MDC pin (optional) MDC(v) - Write v on the MDC pin The previous macros make the driver compatible with the previous version (that didn't support the multi-bus). When the CONFIG_BITBANGMII_MULTI is also defined, the board code needs to fill the bb_miiphy_buses[] array with a record for each required bus and declare the bb_miiphy_buses_num variable with the number of mii buses. The record (struct bb_miiphy_bus) has the following fields/callbacks (see miiphy.h for details): char name[] - The symbolic name that must be equal to the MII bus registered name int (*init)() - Initialization function called at startup time (just before the Ethernet initialization) int (*mdio_active)() - Activate the MDIO pin as output int (*mdio_tristate)() - Activate the MDIO pin as input/tristate pin int (*set_mdio)() - Write the MDIO pin int (*get_mdio)() - Read the MDIO pin int (*set_mdc)() - Write the MDC pin int (*delay)() - Delay function void *priv - Private data used by board specific code The board code will look like: struct bb_miiphy_bus bb_miiphy_buses[] = { { .name = miibus#1, .init = b1_init, .mdio_active = b1_mdio_active, ... }, { .name = miibus#2, .init = b2_init, .mdio_active = b2_mdio_active, ... }, ... int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) / sizeof(bb_miiphy_buses[0]); Signed-off-by: NLuigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com> Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
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- 09 10月, 2009 1 次提交
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由 Wolfgang Denk 提交于
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- 08 10月, 2009 4 次提交
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由 Joakim Tjernlund 提交于
NULL is an absolute value and should not be relocated. After this correction code like: void weak_fun(void) __attribute__((weak)); printf("weak_fun:%p\n", weak_fun); will still print null after relocation. Signed-off-by: NJoakim Tjernlund <Joakim.Tjernlund@transmode.se>
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由 Peter Tyser 提交于
When U-Boot is relocated from flash to RAM pointers are modified accordingly. However, pointers initialzed with NULL values should not be modified so that they maintain their intended NULL value. If the BSS segment is linked at address 0 its address will not be updated as necessary during relocation. This is a temporary workaround. The end goal is to add support to U-Boot to dynamically locate the BSS at an arbitrary address at runtime. When the ability to fixup the BSS inteligently is added, this workaround can be removed and the 85xx link script can put the BSS at a fixed address at link time. Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
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由 Detlev Zundel 提交于
This fixes the code and the comment according to the original intent of doing an intensive memory test when PSC6_3 is pulled low on the STK52xx. Notably PORT_CONFIG will be overridden with this correct code now, so beware. The original code only worked by coincidence depending on the PORT_CONFIG setting from the header file. The new code was tested to ensure that the (undocumented) memory test still works on the STK52x. Signed-off-by: NDetlev Zundel <dzu@denx.de> CC: Martin Krause <Martin.Krause@tqs.de> Minor white-space cleanup. Signed-off-by: NWolfgang Denk <wd@denx.de>
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由 Wolfgang Denk 提交于
Commit 054197ba and later fixes used an array to initialize some of the MDDRC parameters; however, the use of an array turned out to be a bad idea as it was not possible to correlate structure entries to array indices in readable and reliable way. Now we use a struct instead, which makes this self-explanatory. Signed-off-by: NWolfgang Denk <wd@denx.de>
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- 07 10月, 2009 4 次提交
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由 Niklaus Giger 提交于
After running checkstyle.pl on the three previous patches I noted that in the *.h files there were a lot of long lines. This patch solves this problem. Signed-off-by: NNiklaus Giger <niklaus.giger@member.fsf.org> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Niklaus Giger 提交于
The command "reginfo" got an overhaul for the ppc4xx. It dumps all the relevant HW configuration registers (address, symbolic name, content). This allows to easily detect errors in *.h files and changes in the HW configuration. Signed-off-by: NNiklaus Giger <niklaus.giger@member.fsf.org> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Niklaus Giger 提交于
Modify all existing *.c files to use the new register names as seen in the AMCC manuals. Signed-off-by: NNiklaus Giger <niklaus.giger@member.fsf.org> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Niklaus Giger 提交于
Here you find all the changes in the include directory for new register names and adapting other ones to the names used by AMCC in their manuals, e.g. For 440EPx/GRPPC440EPx/GRX, Revision 1.15 – September 22, 2008 For PPC405GP Embedded Processor, Revision 1.02 – March 22, 2006 Signed-off-by: NNiklaus Giger <niklaus.giger@member.fsf.org> Signed-off-by: NStefan Roese <sr@denx.de>
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