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  1. 10 12月, 2019 8 次提交
    • R
      riscv: ax25: cache: Add SPL_RISCV_MMODE for SPL · 8ba595b6
      由 Rick Chen 提交于 
      The mcache_ctl csr only can be manipulated in M mode.
Add SPL_RISCV_MMODE for U-Boot SPL to control cache
operation.
Signed-off-by: NRick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
      8ba595b6
    • R
      riscv: andes_plic: Fix some wrong configurations · 43a0832b
      由 Rick Chen 提交于 
      Fix two wrong settings of andes plic driver as below:

1. Fix wrong pending register base definition.
2. Declaring the en variable in enable_ipi() as unsigned int instead of
   int can help to fix wrong plic enabling setting in RV64.
Signed-off-by: NRick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
      43a0832b
    • R
      riscv: ax25-ae350: Use generic memory size setup · 7e24518c
      由 Rick Chen 提交于 
      To get memory size from device tree instead of
get_ram_size(). This can avoid memory access fault
in U-Boot proper after PMP configurations in OpenSBI.
Signed-off-by: NRick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
      7e24518c
    • R
      riscv: ax25-ae350: add SPL configuration · cd61e86e
      由 Rick Chen 提交于 
      This patch provides four configurations which can support U-Boot SPL
to boot from RAM or FLASH and then boot FIT image including OpenSBI
FW_DYNAMIC firmware and U-Boot proper images from RAM or MMC boot devices.

With ae350_rv[32|64]_spl_defconfigs:

U-Boot SPL will be loaded by gdb or FSBL and runs in RAM in machine mode
and then load FIT image from RAM device on AE350.

With ae350_rv[32|64]_spl_xip_defconfigs:

U-Boot SPL can be burned into SPI flash and run in flash in machine mode
and then load FIT image from SPI flash or MMC device on AE350.
Signed-off-by: NRick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
      cd61e86e
    • R
      riscv: ax25: add SPL support · ca06444a
      由 Rick Chen 提交于 
      The U-Boot SPL will boot in M mode and load the FIT image which
include OpenSBI and U-Boot proper images. After loading progress,
it will jump to OpenSBI first and then U-Boot proper which will
run in S mode.

Also remove V5L2_CACHE due to U-Boot SPL code size consideration.
Without this concern, it can be enable manually for performance.
Signed-off-by: NRick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
      ca06444a
    • R
      Use dts support from U-Boot via OF_SEPARATE instead of depending from opensbi. · 31fbf603
      由 Rick Chen 提交于 
      This would help to make the necessary changes in drivers and device trees
in U-Boot tree itself. This feature would also be helpful to not pass
dtb during opensbi builds.
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NAnup Patel <anup.patel@wdc.com>
Signed-off-by: NRick Chen <rick@andestech.com>
      31fbf603
    • J
      riscv: dts: Add hifive-unleashed-a00 dts from Linux · b82a1854
      由 Jagan Teki 提交于 
      Sync the hifive-unleashed-a00 dts from Linux with
below commit details:

commit <2993c9b04e616df0848b655d7202a707a70fc876> ("riscv: dts: HiFive
Unleashed: add default chosen/stdout-path")

Idea is to periodically sync the dts from Linux instead of
tweaking internal changes one after another, so better not
add any intermediate changes in between. This would help to
maintain the dts files easy and meaningful since we are
reusing device tree files from Linux.
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NAnup Patel <anup.patel@wdc.com>
      b82a1854
    • L
      riscv: increase stack size to avoid a stack overflow during distro boot · 6b20dc16
      由 Lukas Auer 提交于 
      This fixes a problem, where booting Linux using distro boot will
sometimes lead to an invalid instruction exception on the main hart. The
secondary harts are not affected and boot Linux successfully. The root
cause of this problem is a stack overflow on the main hart.

With distro boot, the current default stack size of 8KiB on RISC-V is
not sufficient and will cause a stack overflow. The stacks are allocated
sequentially. In the case of a stack overflow the stack of the main hart
can reach into that of another hart and be corrupted.

The stack overflow previously did not cause any problems, because only
stack frames, which are not used anymore since the hart enters Linux,
were corrupted. Starting with GCC 9, the stack usage has decreased. Now,
only the most recent stack frame overflows into the stack of a secondary
hart and is corrupted. The illegal instruction exception is caused by
the secondary hart overwriting the return address in the stack frame of
the main hart with an address that does not include valid code.

Increase the default stack size of each hart to 16KiB to avoid this
problem.
Reported-by: NAurelien Jarno <aurelien@aurel32.net>
Signed-off-by: NLukas Auer <lukas.auer@aisec.fraunhofer.de>
Tested-by: NDavid Abdurachmanov <david.abdurachmanov@sifive.com>
Tested-by: NAurelien Jarno <aurelien@aurel32.net>
Reviewed-by: NRick Chen <rick@andestech.com>
      6b20dc16
  3. 09 12月, 2019 4 次提交
    • H
      arm: -march=armv5t for ARM11 · 0c5c3f29
      由 Heinrich Schuchardt 提交于 
      In GCC 9 support for the Armv5 and Armv5E architectures (which have no
known implementations) has been removed, cf.
https://gcc.gnu.org/gcc-9/changes.html

Commit 16540d07 ("arm: fix -march for ARM11") changed the value of the
compiler flag from -march=armv5 and -march=armv5t into -march=armv6 for
ARM11.

The values prior to this patch were:

    arch-$(CONFIG_CPU_ARM1136)     =-march=armv5
    arch-$(CONFIG_CPU_ARM1176)     =-march=armv5t

The change lead to a regression with the Raspberry Pi Zero W not booting
anymore.

Use -march=armv5t both for ARM1136 and ARM1176.

Fixes: 16540d07 ("arm: fix -march for ARM11")
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: NJoris Offouga <offougajoris@gmail.com>
      0c5c3f29
    • H
      linux/types.h: fix typo unchar · 37db55b7
      由 Heinrich Schuchardt 提交于 
      unsigned char should be called uchar and not unchar.

This fixes a build error in lib/crypto/x509_cert_parser.c.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
      37db55b7
    • T
      Merge tag 'u-boot-imx-20191209' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx · 2f028458
      由 Tom Rini 提交于 
      Fixes for 2020.01
-----------------

- imx8qxp_mek: increase buffer sizes and args number
- Fixes for imx7ulp
- imx8mm: Fix the first root clock in imx8mm_ahb_sels[]
- colibri_imx7: reserve DDR memory for Cortex-M4
- vining2000: fixes and convert to ethernet DM
- imx8m: fix rom version check to unbreak some B0 chips
- tbs2910: Disable VxWorks image booting support
      2f028458
    • P
      imx8m: fix rom version check to unbreak some B0 chips · 6a4b07e0
      由 Patrick Wildt 提交于 
      Recently the version check was improved to be able to determine that
we're running on SoC revision 2.1.  A check for B0 was tightened so
that it now must equal 0x20 instead of being bigger than 0x20.  On
some B0 chips the value returned is 0x1020 instead of 0x20.  This
means even though it's B0, the check will fail and code relying on
the correct chip revision will make wrong decisions.  There is no
documentation of those bits, but it seems that NXP always uses a
byte to encode the revision.  Thus remove the upper bits to fix the
regression.
Signed-off-by: NPatrick Wildt <patrick@blueri.se>
      6a4b07e0
  5. 08 12月, 2019 3 次提交
  7. 07 12月, 2019 24 次提交
  9. 06 12月, 2019 1 次提交