These are stripped down for bringup, They'll be filled out later
to match-up with the kernel DT contents, and/or as devices are
brought up (mmc, usb, spi, etc.).
Signed-off-by: NTom Warren <twarren@nvidia.com>

These files are used by both SPL and main U-Boot.
Signed-off-by: NTom Warren <twarren@nvidia.com>

These files are for code that runs on the CPU (A15) on T114 boards.
At this time, there is no A15-specific code here.
As T114-specific run-time code is added, it'll go here.
Signed-off-by: NTom Warren <twarren@nvidia.com>

This provides SPL support for T114 boards - AVP early init, plus
CPU (A15) init/jump to main U-Boot.
Signed-off-by: NTom Warren <twarren@nvidia.com>

Common Tegra files are in arch-tegra, shared between T20/T30/T114.
Tegra114-specific headers are in arch-tegra114. Note that some of
these will be filled in as more T114 support is added (drivers,
WB/LP0 support, etc.).
Signed-off-by: NTom Warren <twarren@nvidia.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>

Turn on SPI in cardhu config file
Signed-off-by: NAllen Martin <amartin@nvidia.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Add driver for tegra SPI "SLINK" style driver.  This controller is
similar to the tegra20 SPI "SFLASH" controller.  The difference is
that the SLINK controller is a genernal purpose SPI controller and the
SFLASH controller is special purpose and can only talk to FLASH
devices.  In addition there are potentially many instances of an SLINK
controller on tegra and only a single instance of SFLASH.  Tegra20 is
currently ths only version of tegra that instantiates an SFLASH
controller.

This driver supports basic PIO mode of operation and is configurable
(CONFIG_OF_CONTROL) to be driven off devicetree bindings.  Up to 4
devices per controller may be attached, although typically only a
single chip select line is exposed from tegra per controller so in
reality this is usually limited to 1.

To enable this driver, use CONFIG_TEGRA_SLINK
Signed-off-by: NAllen Martin <amartin@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Add I/O addresses of SPI SLINK controllers 1-6
Signed-off-by: NAllen Martin <amartin@nvidia.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Add tegra30 SPI SLINK nodes to fdt.
Signed-off-by: NAllen Martin <amartin@nvidia.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

SBC1 is SPI controller 1 on tegra30
Signed-off-by: NAllen Martin <amartin@nvidia.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Add support for configuring tegra SPI driver from devicetree.
Support is keyed off CONFIG_OF_CONTROL.  Add entry in seaboard dts
file for spi controller to describe seaboard spi.
Signed-off-by: NAllen Martin <amartin@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Add node for tegra20 SPI SFLASH controller to fdt.
Signed-off-by: NAllen Martin <amartin@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Only add "lcd" into TEGRA_DEVICE_SETTINGS if CONFIG_VIDEO_TEGRA.
Otherwise, "lcd" is meaningless.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

FUNCMUX_ defines should be named after the pin groups they affect, not
after the module they're muxing onto those pin groups.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

This 'commonizes' much of the clock/pll code. SoC-dependent code
and tables are left in arch/cpu/tegraXXX-common/clock.c

Some T30 tables needed whitespace fixes due to checkpatch complaints.
Signed-off-by: NTom Warren <twarren@nvidia.com>

Signed-off-by: NTom Warren <twarren@nvidia.com>

Add back host1x node to seaboard dts file.  This got dropped during
the tegra fdt sort.
Signed-off-by: NAllen Martin <amartin@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

This mux is not currently used and appears to be a carry-over from the
am335x evm code.
Acked-by: NLars Poeschel <poeschel@lemonage.de>
Signed-off-by: NTom Rini <trini@ti.com>

commit b689cd5 OMAP3: use a single board file for IGEP devices

introduced the following build warning:

igep00x0.h:168:24: warning: backslash-newline at end of file [enabled
by default]

This patch fixes the issue.
Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>

For AM335X boards, such as the EVM and Bone Linux kernel fails to
locate the device tree blob on boot. The reason being is that
u-boot is copying the DT blob to the upper part of RAM when booting
the kernel and the kernel is unable to access the blob.
By setting the fdt_high variable to 0xffffffff (to prevent the copy)
the kernel is able to locate the DT blob and boot.

This patch is tested on BeagleBone platform.
Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
Cc: Tom Rini <trini@ti.com>

AM335x EVM 1.5A uses Micron MT41J512M8RH-125 SDRAM 4Gb (512Mx8) as the
DDR3 chip.

[Hebbar Gururaja <gururaja.hebbar@ti.com>]
	- Resolve merge conflict while rebasing. File structure is
	  changed in the mainline. So re-arrange the code accordingly.
	- Update commit message to reflect the DDR3 part number
Signed-off-by: NJeff Lance <j-lance1@ti.com>
Signed-off-by: NTom Rini <trini@ti.com>
Signed-off-by: NHebbar Gururaja <gururaja.hebbar@ti.com>

When ethaddr is not set in environment the MAC address is read
from efuse. The message was only printed in debug case, but this
message could be of interest for the ordinary user, so printf it.
Signed-off-by: NLars Poeschel <poeschel@lemonage.de>

The board is named pcm051 and has this hardware:
SOC: TI AM3359
DDR3-RAM: 2x MT41J256M8HX-15EIT:D 512MiB
ETH 1: LAN8710AI
SPI-Flash: W25Q64BVSSIG
RTC: RV-4162-C7
I2C-EEPROM: CAT32WC32
NAND: MT29F4G08_VFPGA63
PMIC: TPS65910A3
LCD

Supported:
UART 1
MMC/SD
ETH 1
USB
I2C
SPI

Not yet supported:
NAND
RTC
LCD
Signed-off-by: NLars Poeschel <poeschel@lemonage.de>
[trini: Add #define CONFIG_PHY_ADDR 0 to config]
Signed-off-by: NTom Rini <trini@ti.com>

Signed-off-by: NLars Poeschel <poeschel@lemonage.de>

For production systems it is better to use script images since
they are protected by checksums and carry valuable information like
name and timestamp. Also, you can't validate the content passed to
env import.

But for development, it is easier to use the env import command and
plain text files instead of script-images.

Since both OMAP4 supported boards (Panda and TI SDP4430) are used
primarily for development, this patch allows U-Boot to load env var
from a text file in case that an boot.scr script-image is not present.

The variable uenvcmd (if existent) will be executed (using run) after
uEnv.txt was loaded. If uenvcmd doesn't exist the default boot sequence
will be started.
Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: NNishanth Menon <nm@ti.com>

This patch adds an GPIO LED boot status for IGEP boards.

The GPIO LED used is the red LED0 while the Linux kernel
uses the green LED0 as the boot status.

By using different GPIO LEDs, the user can know in which
step of the boot process the board currently is.
Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: NIgor Grinberg <grinberg@compulab.co.il>

Even when the IGEPv2 board and the IGEP Computer-on-Module
are different from a form factor point of view, they are
very similar in the fact that share many components and how
they are wired.

So, it is possible (and better) to have a single board file
for both devices and just use the CONFIG_MACH_TYPE to make
a differentiation between each board when needed.

This change avoids code duplication by removing 298 lines of
code and makes future maintenance easier.
Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: NIgor Grinberg <grinberg@compulab.co.il>

Older compilers don't recognize v7 wfi instruction, so use wfi macro to
fix builds on old compilers.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

Since wfi instruction is only available on ARMv7, add a conditional
macro for it.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

Set ETM TRCLK down to 78MHz to get clear wave form.
This patch makes difference only when you use ETM trace connecting JTAG debugger.
Signed-off-by: NTetsuyuki Kobayashi <koba@kmckk.co.jp>
Acked-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>

After stress test, I found some of kzm9g board occures memory failure.
This patch adust SDRAM setting.
- Enlarge drivability on both SDRAM controller and SDRAM itself
- Raise core voltage
Signed-off-by: NTetsuyuki Kobayashi <koba@kmckk.co.jp>
Acked-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>

The following features are supported:
 * 128 MB DDR1 SDRAM
 * DUART
 * SD/MMC Card Socket
Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
Tested-by: NFabio Estevam <fabio.estevam@freescale.com>

This adds a default environment with support for MMC booting.
Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>

Add support for the MMC attached to SSP1.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>

The MX23 has different layout of DMA channels. Fix the MMC
driver to support MX23.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>

Some MXS based boards do not implement the card-detect signal. Allow
user to specify alternate card-detect implementation.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>

This does the same reset mask as done in v3.7 Linux kernel code.
The block is properly configured for MMC operation that way.
Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>

The MX23 SSP register layout differs from MX28 in certain bits,
adjust the register layout accordingly.
Signed-off-by: NMarek Vasut <marex@denx.de>
Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>

The MX23 has less channels for the APBH DMA, sligtly different register
layout and some bits in those registers are placed differently. Reflect
this in the driver. This patch fixes MMC/DMA issue on MX23.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>