This adds following new targets:

 - update_nand_kernel
 - update_nand_fdt
 - update_nand_filesystem

and to avoid confusion, the 'update_nand_full' has been renamed to
'update_nand_firmware_full'.
Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>

This reads the kernel, ftd and boot into ubifs filesystem. While on
that, the SD firmware filename definition has been moved next to the
other SD related commands.
Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
Reviewed-by: NFabio Estevam <fabio.estevam@freescale.com>

Using 512k for fdt partition allow it to be aligned with the other
small partitions and 512k erase block size.
Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
Acked-by: NStefano Babic <sbabic@denx.de>

The macro allows easy setting in per-pin, as for example:

,----
| imx_iomux_v3_setup_pad(MX6_PAD_NANDF_D1__GPIO_2_1 | MUX_MODE_SION);
`----

The IOMUX_CONFIG_SION allows for reading PAD value from PSR register.

The following quote from the datasheet:

,----
| ...
| 28.4.2.2 GPIO Write Mode
| The programming sequence for driving output signals should be as follows:
| 1. Configure IOMUX to select GPIO mode (Via IOMUXC), also enable SION if need
| to read loopback pad value through PSR
| 2. Configure GPIO direction register to output (GPIO_GDIR[GDIR] set to 1b).
| 3. Write value to data register (GPIO_DR).
| ...
`----

This fixes the gpio_get_value to properly work when a GPIO is set for
output and has no conflicts.

Thanks for Benoît Thébaudeau <benoit.thebaudeau@advansee.com>, Fabio
Estevam <fabio.estevam@freescale.com> and Eric Bénard
<eric@eukrea.com> for helping to properly trace this down.
Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
Acked-by: NStefano Babic <sbabic@denx.de>

As U-boot does not use GPU/VPU peripherals, shutdown the VDDPU regulator
in order to save power.
Signed-off-by: NAnson Huang <b20788@freescale.com>
Signed-off-by: NJason Liu <r64343@freescale.com>
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

When changing LDO voltages we need to wait for the required amount of time
for the voltage to settle.

Also, as the timer is still not available when arch_cpu_init() is called, we
need to call it later at board_postclk_init() phase.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

Introduce set_ldo_voltage() so that all three LDO regulators can be configured.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

mx6 datasheet specifies that the minimum VDDSOC at 792 MHz is 1.15 V.
Add a 25 mV margin and set it to 1.175V.

This also matches the VDDSOC voltages for 792MHz operation that the kernel configures:
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/arch/arm/mach-mx6/cpu_op-mx6.c?h=imx_3.0.35_4.1.0Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

Since ROM may modify the LDO ramp up time according to fuse setting,
it is safer to reset the ramp up field to its default value of 00:

00: 64 cycles of 24MHz clock;
01: 128 cycles of 24MHz clock;
02: 256 cycles of 24MHz clock;
03: 512 cycles of 24MHz clock;
Signed-off-by: NAnson Huang <b20788@freescale.com>
Signed-off-by: NJason Liu <r64343@freescale.com>
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

set_vddsoc() is not used anywhere else, so make it static.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

Add CONFIG_CMD_FUSE option, so that the fuse API can be used.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>

When using the fuse API in U-boot user must calculate the 'bank' and 'word'
values.

Provide a real example on how to calculate such values for the mx6q.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>

Commit 164d9846 breaks
board with SATA support, because sata is not compiled.
Signed-off-by: NStefano Babic <sbabic@denx.de>

ROM did not invalidate L1 cache when download by usb
Need invalidate L1 cache before enable cache
Signed-off-by: NHuang yongcai <b20788@freescale.com>
Signed-off-by: NFrank Li <Frank.Li@freescale.com>

According to NOTE in strtoul(3), the errno must be zeroed before strtoul()
is called. Zero the errno. The NOTE reads as such:

  Since strtoul() can legitimately return 0 or ULONG_MAX (ULLONG_MAX for
  strtoull()) on both success and failure, the calling program should set
  errno  to  0  before the call, and then determine if an error occurred
  by checking whether errno has a nonzero value after the call.

This issue was detected on Fedora 19 with glibc 2.17 .
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>

mx6sabresd boards have a 18-bit LVDS data width and the correct color format
is RGB666.
Suggested-by: NLiu Ying <Ying.Liu@freescale.com>
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

HSYNC, VSYNC and DISP_CLK are very useful display signals for debugging.

Configure them as active pins.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

According to the mx6 quad reference manual, the DIV_SELECT field of register
CCM_ANALOG_PLL_ENETn has the following meaning:

"Controls the frequency of the ethernet reference clock.
- 00 - 25MHz
- 01 - 50MHz
- 10 - 100MHz
- 11 - 125MHz"

Current logic does not handle the 25MHz case correctly, so fix it.
Signed-off-by: NRabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

This patch adds support for the AMPIRE 800x480 LCD panel that is available
for M53EVK.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Align with the context to use readl() to read the CCM_CCGR3
register with memory barrier instead of __raw_readl().
Signed-off-by: NLiu Ying <Ying.Liu@freescale.com>
Reviewed-by: NFabio Estevam <fabio.estevam@freescale.com>

The CPU errata expressed in include/configs/mx6_common.h apply
to all i.MX6DQ and i.MX6DLS parts.
Signed-off-by: NEric Nelson <eric.nelson@boundarydevices.com>
Reviewed-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NStefan Roese <sr@denx.de>

According to the README:

"- CONFIG_SYS_SPD_BUS_NUM
		If SPD EEPROM is on an I2C bus other than the first
		one, specify here. Note that the value must resolve
		to something your driver can deal with."

There is no SPD EEPROM on the imx boards, so ged rid of this option.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NStefano Babic <sbabic@denx.de>

Add SATA support on uDoo Board.
Signed-off-by: NGiuseppe Pagano <giuseppe.pagano@seco.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>

Move setup_sata function definition from platform file nitrogen6x.c
to arch/arm/imx-common/sata.c to avoid code duplication.
Signed-off-by: NGiuseppe Pagano <giuseppe.pagano@seco.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Eric Nelson <eric.nelson@boundarydevices.com>

This allows the use of either or both declarations from
the files mx6q_pins.h and mx6dl_pins.h.

All board files should include <asm/arch/mx6-pins.h>
with one of the following defined in boards.cfg
    MX6Q   - for boards targeting i.MX6Q or i.MX6D
    MX6DL  - for boards targeting i.MX6DL
    MX6S   - for boards targeting i.MX6S
    MX6QDL - for boards that support any of the above with
             run-time detection

Pad declarations will be MX6_PAD_x for single-variant boards
and MX6Q_PAD_x and MX6DL_PAD_x for boards supporting both
processor classes.
Signed-off-by: NEric Nelson <eric.nelson@boundarydevices.com>
Acked-by: NStefano Babic <sbabic@denx.de>

The pmic_init() function has the I2C or SPI bus number that is connected to the
PMIC.

Instead of passing I2C_PMIC, explicitly pass the I2C bus number via I2C_x
definition.

The motivation for doing this is to avoid people just doing a copy and paste
of I2C_PMIC into their board file when another I2C bus is actually used to
interface to their PMIC.

This also makes more obvious which is the I2C bus connected to the PMIC, without
having to search in the source code for the meaning of the 'I2C_PMIC' number.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NStefano Babic <sbabic@denx.de>

uDoo uses APX823-31W5 watchdog chip. Timeout is about 1.2 seconds.
To disabled watchdog during kernel boot, WDI pin of that chip needs to be
in "high impedance" state. I.mx6 gpio configuration does not contemplate
tristate, so pin is set as input in high impedance.
Signed-off-by: NGiuseppe Pagano <giuseppe.pagano@seco.com>
Reviewed-by: NFabio Estevam <fabio.estevam@freescale.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>

Add Ethernet and networking support on uDoo board (FEC +phy Micrel KSZ9031).
Ethernet speed is currently limited to 10/100Mbps.
Signed-off-by: NGiuseppe Pagano <giuseppe.pagano@seco.com>
Tested-by: NFabio Estevam <fabio.estevam@freescale.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>

Previous uDoo configuration adopts register settings for DDR3, clock, muxing,
etc. taken from Nitrogen6x. uDoo schematics is rather different from that board,
and it needs customized setting for most of the registers.
All this changes can be considered atomical since it is part of initial support
of the board.

Patch changes uDoo configuration files path to a specific one, and adopt
optimized value for every configured register.
Signed-off-by: NGiuseppe Pagano <giuseppe.pagano@seco.com>
Tested-by: NFabio Estevam <fabio.estevam@freescale.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>

mx6sabre board has a m25p32 SPI NOR connected to ECSPI1 port.

Add support for it.

This patch allows the SPI NOR flash to be succesfully detected:

=> sf probe
SF: Detected M25P32 with page size 256 Bytes, erase size 64 KiB, total 4 MiB
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

Currently HDMI splash screen is selected by default on mx6sabresd boards.

As LVDS is also enabled, this causes incorrect colors to be displayed im the
LVDS panel.

Fix this by selecting the LVDS panel as the default splash output and only keep
HDMI or LVDS turned on at the same time.
Acked-by: NLiu Ying <Ying.Liu@freescale.com>
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

There is no need to pass p->bus differently when the PMIC is connected via SPI
or via I2C.

Handle the both cases in the same way.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

On efikamx board the PMIC is connected via SPI interface, so it does not make
sense to pass I2C_PMIC into the pmic_init() interface.

Pass the SPI bus number via CONFIG_FSL_PMIC_BUS option instead.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

On mx31pdk board the PMIC is connected via SPI interface, so it does not make
sense to pass I2C_PMIC into the pmic_init() interface.

Pass the SPI bus number via CONFIG_FSL_PMIC_BUS option instead.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

On mx51evk board the PMIC is connected via SPI interface, so it does not make
sense to pass I2C_PMIC into the pmic_init() interface.

Pass the SPI bus number via CONFIG_FSL_PMIC_BUS option instead.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NStefano Babic <sbabic@denx.de>

Signed-off-by: NEric Nelson <eric.nelson@boundarydevices.com>

OCOTP driver is currently selected via CONFIG_MXC_OCOTP option.

Remove the old OCOTP related options, as they are not used anymore.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NEric Nelson <eric.nelson@boundarydevices.com>

The fec_halt() never free'd both RX and TX DMA descriptors that
were allocated in fec_init(), nor did it free the RX buffers.
Rework the FEC driver so that these descriptors and buffers are
allocated only once in fec_probe().
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>

Signed-off-by: NEric Nelson <eric.nelson@boundarydevices.com>

Signed-off-by: NEric Nelson <eric.nelson@boundarydevices.com>