- 13 6月, 2020 15 次提交
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由 Marek Vasut 提交于
Add support for driver model to the driver. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
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由 Marek Vasut 提交于
Do not re-read the HW address from the EEPROM on every start of transfer, otherwise the user will not be able to adjust ethaddr as needed. Read the address only once, when the card is detected. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
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由 Marek Vasut 提交于
Use this macro to fully fill the PCI device ID table. This is mandatory for the DM PCI support, which checks all the fields. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
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由 Marek Vasut 提交于
Split the driver into common and non-DM functionality, so that the DM support can later re-use the common code, while we retain the non-DM code until all the platforms are converted. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
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由 Marek Vasut 提交于
Instead of always calling rtl8139_eeprom_delay() with priv->ioaddr, call it with priv and let the function access priv->ioaddr. This reduces code duplication and has no impact, since the compiler will inline this as needed anyway. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
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由 Marek Vasut 提交于
Introduce rtl8139_pdata, which is a super-structure around eth_device and tracks per-device state, here the device IO address, PCI BDF, RX and TX ring position. Pass this structure around instead of the old non-DM eth_device in preparation for DM conversion. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
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由 Marek Vasut 提交于
These macros depended on the dev variable being declared wherever they were used. This is wrong and will not work with DM anyway, so pass only the PCI BFD into these macros, which fixes the dependency and prepares them for DM support as well. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
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由 Marek Vasut 提交于
Replace the use of custom static ioaddr variable with common dev->iobase, no functional change. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
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由 Marek Vasut 提交于
Replace malloc()+memset() combination with calloc(), no functional change. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
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由 Marek Vasut 提交于
Pull the device name setting into a separate function, as this will be shared between DM/non-DM variants. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
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由 Dan Murphy 提交于
Add the DP8382X generic PHY registration to the TI PHY init file. Acked-by: NMichal Simek <michal.simek@xilinx.com> Signed-off-by: NDan Murphy <dmurphy@ti.com>
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由 Dan Murphy 提交于
ti_phy_init function was allocated to the DP83867 PHY. This function name is to generic for a specific PHY. The function can be moved to a TI specific file that can register all TI PHYs that are defined in the defconfig. The ti_phy_init file will contain all TI PHYs initialization so that only phy_ti_init can be called from the framework. In addition to the above the config flag for the DP83867 needs to be changed in the Kconfig and dependent defconfig files. The config flag that was used for the DP83867 was also generic in nature so a more specific config flag for the DP83867 was created. Acked-by: NMichal Simek <michal.simek@xilinx.com> Signed-off-by: NDan Murphy <dmurphy@ti.com>
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由 Florin Chiculita 提交于
There are devices accesible through mdio clause-45, such as retimers, that do not have PMA or PCS blocks. This patch adds MDIO_MMD_VEND1 on the list of device addresses where phyid is searched. Previous order of devices was kept. Signed-off-by: NFlorin Chiculita <florinlaurentiu.chiculita@nxp.com> Reviewed-by: NMadalin Bucur <madalin.bucur@oss.nxp.com>
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由 Tom Warren 提交于
This is a WAR for DHCP failure after rebooting from the L4T kernel. The r8169.c kernel driver is setting bit 19 of the rt816x HW register 0xF0, which goes by FuncEvent and MISC in various driver source/datasheets. That bit is called RxDv_Gated_En in the r8169.c kernel driver. Clear it here at the end of probe to ensure that U-Boot can get an IP assigned via DHCP. Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Bryan O'Donoghue 提交于
Linux commit 232ba3a51cc2 ('net: phy: Micrel KSZ8061: link failure after cable connect') implements a fix for the above errata. This patch replicates that errata fix in an ksz8061 specific init routine. Signed-off-by: NBryan O'Donoghue <bod@denx.de> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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- 05 6月, 2020 3 次提交
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由 Heinrich Schuchardt 提交于
Add the missing Kconfig dependency and let VIRTIO_RNG default to yes. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Michal Simek 提交于
Debug console is the part of serial driver in the same file. It means to be able to enable debug console you also need to enable driver itself. That's why add all dependecies and list only debug consoles which are enabled based on driver selection to avoid compilation error when user asks for certain debug console but driver is not enable for it. Error: aarch64-linux-gnu-ld.bfd: common/built-in.o: in function `putc': /home/monstr/data/disk/u-boot/common/console.c:513: undefined reference to `printch' aarch64-linux-gnu-ld.bfd: common/built-in.o: in function `puts': /home/monstr/data/disk/u-boot/common/console.c:563: undefined reference to `printch' Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Reviewed-by: NSimon Glass <sjg@chromium.org> [trini: Fix ns16550 dependency, add ZYNQ_SERIAL, change S5P] Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Tom Rini 提交于
The symbol "CONFIG_ARM_DCC" is used to control building drivers/serial/arm_dcc.c. Provide a simple Kconfig entry for this. Cc: Luca Ceresoli <luca@lucaceresoli.net> Cc: Michal Simek <monstr@monstr.eu> Cc: Tom McLeod <tom.mcleod@opalkelly.com> Cc: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: NTom Rini <trini@konsulko.com> Reviewed-by: NLuca Ceresoli <luca@lucaceresoli.net>
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- 04 6月, 2020 10 次提交
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由 Jaiprakash Singh 提交于
Move errata A008109, A008378, 009942 workaround implementation from compute_fsl_memctl_config_regs() to fsl_ddr_set_memctl_regs() and add register write after each workaround implementation. Signed-off-by: NJaiprakash Singh <Jaiprakash.singh@nxp.com> Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Joakim Tjernlund 提交于
Impl. erratum as descibed in errata doc. Enable A008109 for T1040 and T1024 Signed-off-by: NJoakim Tjernlund <joakim.tjernlund@infinera.com> Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Hou Zhiqiang 提交于
When an eTSEC is configured to use TBI, configuration of the TBI is done through the MIIM registers for that eTSEC. For example, if a TBI interface is required on eTSEC2, then the MIIM registers starting at offset 0x2_5520 are used to configure it. Fixes: 9a1d6af5 ("net: tsec: Add driver model ethernet support") Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: NVladimir Oltean <vladimir.oltean@nxp.com> Tested-by: NVladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Hou Zhiqiang 提交于
The current code accesses eTSEC registers using physical address directly, it's not correct, though no problem on current platforms. It won't work on platforms, which does not support 1:1 virtual-physical address map. Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: NVladimir Oltean <vladimir.oltean@nxp.com> Tested-by: NVladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Madalin Bucur 提交于
Allow the MDIO devices to be probed based on the device tree. Signed-off-by: NMadalin Bucur <madalin.bucur@oss.nxp.com> Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Pragnesh Patel 提交于
U-Boot ethernet works with FSBL flow where releasing ethernet clock reset is part of FSBL itself but with the SPL, We need to release ethernet clock reset explicitly for U-Boot proper. With this change Release ethernet clock reset code in FSBL might not be needed or unaffected. Signed-off-by: NPragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Tested-by: NBin Meng <bmeng.cn@gmail.com>
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由 Pragnesh Patel 提交于
Release ddr clock reset once clock is initialized Signed-off-by: NPragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Tested-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NJagan Teki <jagan@amarulasolutions.com> Tested-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Pragnesh Patel 提交于
Added clock enable and disable functions in prci ops Signed-off-by: NPragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Tested-by: NBin Meng <bmeng.cn@gmail.com> Acked-by: NJagan Teki <jagan@amarulasolutions.com> Tested-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Pragnesh Patel 提交于
Add driver for fu540 to support ddr initialization in SPL. This driver is based on FSBL (https://github.com/sifive/freedom-u540-c000-bootloader.git) Signed-off-by: NPragnesh Patel <pragnesh.patel@sifive.com> Tested-by: NBin Meng <bmeng.cn@gmail.com>
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由 Pragnesh Patel 提交于
Added a misc driver to handle OTP memory in SiFive SoCs. Signed-off-by: NPragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Tested-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NJagan Teki <jagan@amarulasolutions.com> Tested-by: NJagan Teki <jagan@amarulasolutions.com>
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- 03 6月, 2020 6 次提交
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由 Madalin Bucur 提交于
A compilation error appears when QE is compiled with DM_ETH enabled: drivers/qe/uec.c: In function 'init_phy': drivers/qe/uec.c:425:28: error: dereferencing pointer to incomplete type 'struct eth_device' uec = (uec_private_t *)dev->priv; ^~ drivers/qe/uec.c: In function 'uec_initialize': drivers/qe/uec.c:1357:43: error: invalid application of 'sizeof' to incomplete type 'struct eth_device' dev = (struct eth_device *)malloc(sizeof(struct eth_device)); ^~~~~~ The patch disables CONFIG_QE when CONFIG_DM_ETH is set. Signed-off-by: NMadalin Bucur <madalin.bucur@oss.nxp.com> Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Madalin Bucur 提交于
Compilation error occur when DM_ETH is enabled without DM_PCI. Signed-off-by: NMadalin Bucur <madalin.bucur@oss.nxp.com> Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Frédéric Danis 提交于
This config option depends on EXT4 support. If Ext4 write capability is not selected, it generate write error messages and is unable to maintain boot counter. Signed-off-by: NFrédéric Danis <frederic.danis@collabora.com>
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由 Marcin Juszkiewicz 提交于
Description said that OHCI is not supported for driver model while it was converted too. Signed-off-by: NMarcin Juszkiewicz <marcin@juszkiewicz.com.pl>
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由 Marcin Juszkiewicz 提交于
All three options had the same description. Signed-off-by: NMarcin Juszkiewicz <marcin@juszkiewicz.com.pl>
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由 Simon Glass 提交于
This is defined in the asm/cache.h header file. Update this header file to include it so it gets the same value consistently across U-Boot. This fixes 'usb host' on omapl138_lcdk. Fixes: 90526e9f ("common: Drop net.h from common header") Reported-by: NAdam Ford <aford173@gmail.com> Signed-off-by: NSimon Glass <sjg@chromium.org> Tested-by: NAdam Ford <aford173@gmail.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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- 02 6月, 2020 4 次提交
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由 Simon Glass 提交于
At present this logic does not work on link and samus, since their SPI controller is not a PCI device, but a child of the PCH. Unfortunately, fixing this involves a lot of extra logic. Still, this was requested in the review of the fix-up patch, so here it is. Fixes: 92842147 ("spi: ich: Add support for get_mmap() method") Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> (on Intel minnowmax)
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由 Samuel Holland 提交于
The H6 EMAC is very similar to the H3 variant, except that it uses the same pinmux as R40. Add support for it. Signed-off-by: NSamuel Holland <samuel@sholland.org> Reviewed-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Samuel Holland 提交于
While the R40 uses a different register for EMAC clock configuration than other chips, the register has a very similar layout. Reuse the existing bitfield definitions in this file, since they match. This allows the driver to compile on the H6 platform, where the CCM_GMAC_CTRL definitions are not present. Signed-off-by: NSamuel Holland <samuel@sholland.org> Reviewed-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Roman Stratiienko 提交于
H6 SOC needs additional initialization of PHY registers. Corresponding changes can be found in the kernel patch [1]. Without this changes there is no enumeration of 'musb' gadget. [1] - https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=ae409cc7c3cdb9ac4a1dba3eae70efec3d6b6c79 Fixes: 35fa673e ("sunxi: phy: Add USB PHY support for Allwinner H6") Signed-off-by: NRoman Stratiienko <r.stratiienko@gmail.com> Reviewed-by: NJagan Teki <jagan@amarulasolutions.com>
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- 01 6月, 2020 2 次提交
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由 Jagan Teki 提交于
dm_spi_slave_platdata used in sf_probe for printing plat->cs value and there is no relevant usage apart from this. We have enough debug messages available in SPI and SF areas so drop this plat get and associated bug statement. Cc: Simon Glass <sjg@chromium.org> Cc: Vignesh R <vigneshr@ti.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Jagan Teki 提交于
Currently spi-nor code is assigning _write ops for SST and other flashes separately. Just call the sst_write from generic write ops and return if SST flash found, this way it avoids the confusion of multiple write ops assignment during the scan and makes it more feasible for code readability. No functionality changes. Cc: Simon Glass <sjg@chromium.org> Cc: Vignesh R <vigneshr@ti.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
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