This is the first step to use DM support for the KM powerpc boards.
Signed-off-by: NHolger Brunck <holger.brunck@ch.abb.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
CC: Mario Six <mario.six@gdsys.cc>
CC: Wolfgang Denk <wd@denx.de>
CC: Valentin Longchamp <valentin.longchamp@ch.abb.com>
CC: Priyanka Jain <priyanka.jain@nxp.com>

Signed-off-by: NRan Wang <ran.wang_1@nxp.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Signed-off-by: NRan Wang <ran.wang_1@nxp.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Signed-off-by: NRan Wang <ran.wang_1@nxp.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Signed-off-by: NRan Wang <ran.wang_1@nxp.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Signed-off-by: NRan Wang <ran.wang_1@nxp.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Signed-off-by: NRan Wang <ran.wang_1@nxp.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Signed-off-by: NRan Wang <ran.wang_1@nxp.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Signed-off-by: NRan Wang <ran.wang_1@nxp.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Signed-off-by: NRan Wang <ran.wang_1@nxp.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Signed-off-by: NRan Wang <ran.wang_1@nxp.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Remove this from the board header files and move it to Kconfig. Also use
the correct default address for kmtegr1.
Signed-off-by: NHolger Brunck <holger.brunck@ch.abb.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
CC: Priyanka Jain <priyanka.jain@nxp.com>
CC: Valentin Longchamp <valentin.longchamp@ch.abb.com>

Add support for coral which is a range of Apollo Lake-based Chromebook
released in 2017. This also includes reef released in 2016, since it is
based on the same SoC.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

The existing work-around for positioning U-Boot in the ROM when it
actually runs from RAM still exists and there is not obvious way to change
this.

Add a proper Kconfig option to handle this case. This also adds a new bool
property to indicate whether CONFIG_SYS_TEXT_BASE exists.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

Add a simple sandbox test for this uclass.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

Add a sandbox driver and PCI-device emulator for p2sb. Also add a test
which uses a simple 'adder' driver to test the p2sb functionality.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

At present if CONFIG_SPL_GPIO_SUPPORT is enabled then the GPIO uclass
is included in SPL/TPL without any control for boards. Some boards may
want to disable this to reduce code size where GPIOs are not needed in
SPL or TPL.

Add a new Kconfig option to permit this. Default it to 'y' so that
existing boards work correctly.

Change existing uses of CONFIG_DM_GPIO to CONFIG_IS_ENABLED(DM_GPIO) to
preserve the current behaviour. Also update the 74x164 GPIO driver since
it cannot build with SPL.

This allows us to remove the hacks in config_uncmd_spl.h and
Makefile.uncmd_spl (eventually those files should be removed).
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

The rpi_4_32b_defconfig states that only one DRAM bank is present. This
leads to a wrong configuration of the available DRAM. Fix this by
setting the DRAM bank config accordingly.

Fixes: 193279d7 ("RPI: Add defconfigs for rpi4 (32/64)")
Signed-off-by: NMatthias Brugger <mbrugger@suse.com>

In the initial SPI flash setup, the default bus mode being used was 3,
which is incorrect, causing a CRC error when the ENV was being read from
QSPI. Setting the default bus mode to 0 which is the correct mode.
Signed-off-by: NSwapna Gurumani <swapna.gurumani@microchip.com>

This patch provides four configurations which can support U-Boot SPL
to boot from RAM or FLASH and then boot FIT image including OpenSBI
FW_DYNAMIC firmware and U-Boot proper images from RAM or MMC boot devices.

With ae350_rv[32|64]_spl_defconfigs:

U-Boot SPL will be loaded by gdb or FSBL and runs in RAM in machine mode
and then load FIT image from RAM device on AE350.

With ae350_rv[32|64]_spl_xip_defconfigs:

U-Boot SPL can be burned into SPI flash and run in flash in machine mode
and then load FIT image from SPI flash or MMC device on AE350.
Signed-off-by: NRick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>

This would help to make the necessary changes in drivers and device trees
in U-Boot tree itself. This feature would also be helpful to not pass
dtb during opensbi builds.
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NAnup Patel <anup.patel@wdc.com>
Signed-off-by: NRick Chen <rick@andestech.com>

Enable configs related to DMA and Ethernet so as to support networking at
U-Boot prompt
Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com>

Many boards do not use all selected framebuffer depth
configurations, for such boards there is some unused
code in video and console uclass routines. Make depth
specific code optional to avoid dead code and slightly
reduce binary size. Also make ANSI code optional for
the same reason. When i.e. using only VIDEO_BPP16 the
code size shrinks (below values when using gcc-7.3.0):

  $ ./tools/buildman/buildman -b video-wip -sS wandboard
  ...
  01: Merge git://git.denx.de/u-boot-sh
  02: video: add guards around 16bpp/32bbp code
  03: video: make BPP and ANSI configs optional
         arm: (for 1/1 boards) all -776.0 bss -8.0 text -768.0
Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Tested-by: NEugen Hristev <eugen.hristev@microchip.com>
Tested-by: NPatrice Chotard <patrice.chotard@st.com>
Tested-by: NSteffen Dirkwinkel <s.dirkwinkel@beckhoff.com>

The fitImage support was enabled in the downstream U-Boot port and the
kernel images on the device are fitImage, yet this functionality is not
enabled in mainline U-Boot. Enable it.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>

Convert the board to ethernet DM support. Adjust board file accordingly,
as the board_eth_init() contains custom clock configuration required for
this board to work. Furthermore, enable FEC1 clock to make FEC1 work as
well.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>

Enable DRAM calibration in SPL to improve behavior of the board
in edge conditions of the thermal envelope of the board and make
it even more stable.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>

In preparation for use of DDR DRAM fine-tuning upon boot,
convert the board to SPL framework instead of using DCD
tables to bring up DRAM and pinmux.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>

U-Boot binary has grown in such a way that it goes beyond the reserved
area for the environment variables.

Running "saveenv" followed by a "reset" causes U-Boot to hang because
of this overlap.

Fix this problem by increasing the CONFIG_ENV_OFFSET size.

Also, in order to prevent this same problem in the future, use
CONFIG_BOARD_SIZE_LIMIT, which will detect the overlap in build-time.

CONFIG_BOARD_SIZE_LIMIT does not accept math expressions, so declare
CONFIG_ENV_OFFSET with its direct value instead.
Signed-off-by: NFabio Estevam <festevam@gmail.com>
Acked-by: NPierre-Jean Texier <pjtexier@koncepto.io>
Tested-by: NPierre-Jean Texier <pjtexier@koncepto.io>
Acked-by: NJoris Offouga <offougajoris@gmail.com>
Tested-by: NJoris Offouga <offougajoris@gmail.com>

This enables reading of the cpuid and a static MAC address.
Signed-off-by: NBen Wolsieffer <benwolsieffer@gmail.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

This is a core board named Core-PX30-JD4 with a mainboard from Firefly,
name it as firefly-px30 for now.
This board can re-use the dts of PX30, the only difference is the UART IO,
the firefly use UART2 M1 while evb use UART2 M0.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

PX5 evb has no ETH port, so disable it.
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

SPL has limited available resources, and the performance between
ARM and Thumb isn't that significant.

This patch builds using Thumb instruction set to reduce the code
size by nearly 6K.

Original:
   text	   data	    bss	    dec	    hex	filename
  26526	   4004	   1376	  31906	   7ca2	spl/u-boot-spl

Thumb:

   text	   data	    bss	    dec	    hex	filename
  20232	   4004	   1376	  25612	   640c	spl/u-boot-spl
Signed-off-by: NAdam Ford <aford173@gmail.com>
Tested-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>

The da850-evm doesn't have the boot pins configured in a way
to make MMC/SD booting an option, and MMC/SD support is not
enabled in SPL.  Therefore, there is no need to support raw mode
mmc/sd support in SPL.

This patch disables CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
Signed-off-by: NAdam Ford <aford173@gmail.com>

Rsync all defconfig files using moveconfig.py
Signed-off-by: NTom Rini <trini@konsulko.com>

CONFIG_DFU_NAND needs the raw NAND core being compiled.

Also fix the colibri_vf defconfig to reflect this dependency.
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: NBoris Brezillon <boris.brezillon@bootlin.com>

Enabling TFABOOT configuration will compile-in a call to nand_read in
the boot sequence. Handle the situation by also selecting officially
the raw NAND core in this case.
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>

There is no flash on this board, there is no reason to define MTD
environment variables nor UBI. Drop them from the configuration file.
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: NWolfgang Grandegger <wg@aries-embedded.de>

While the right Kconfig entries were selected, because of the missing
CMD_NAND symbol the raw NAND core was never compiled. Remove it from
the defconfigs otherwise the build will fail.
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
[trini: Also do this on bcm11130_nand]
Signed-off-by: NTom Rini <trini@konsulko.com>

Due to previous Makefile organization, the raw NAND subdirectory was
not compiled in if CMD_NAND was not enabled. Because the Denali driver
does not compile with these boards (undefined environment offset),
remove the dependency within the defconfig over the controller driver
(was ignored anyway in the past).
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>