1. 10 7月, 2008 1 次提交
  2. 03 7月, 2008 2 次提交
  3. 12 6月, 2008 2 次提交
    • S
      ppc4xx: Canyonlands: Disable the RTC M41T62 square wave output · 212ed906
      Stefan Roese 提交于
      This patch disables the square wave output of the M41T62 RTC used on
      Canyonlands & Glacier. Here the explanation:
      
      The serial real-time clock part used in the design is an
      STMicro M41T62. This part has a full-time 32KHz square wave
      output that is connected to the TmrClk input to the
      processor. The default state for this square wave output is
      enabled so the output runs continuously when the board is
      powered normally and also from the battery. The TmrClk input
      to the processor goes to ground when the power is removed
      from the board/processor, and therefore the running square
      wave output is driving ground which drains the battery quickly.
      Signed-off-by: NStefan Roese <sr@denx.de>
      212ed906
    • B
      Change initdram() return type to phys_size_t · 9973e3c6
      Becky Bruce 提交于
      This patch changes the return type of initdram() from long int to phys_size_t.
      This is required for a couple of reasons: long int limits the amount of dram
      to 2GB, and u-boot in general is moving over to phys_size_t to represent the
      size of physical memory.  phys_size_t is defined as an unsigned long on almost
      all current platforms.
      
      This patch *only* changes the return type of the initdram function (in
      include/common.h, as well as in each board's implementation of initdram).  It
      does not actually modify the code inside the function on any of the platforms;
      platforms which wish to support more than 2GB of DRAM will need to modify
      their initdram() function code.
      
      Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc
      MPC8641HPCN.
      Signed-off-by: NBecky Bruce <becky.bruce@freescale.com>
      9973e3c6
  4. 06 6月, 2008 1 次提交
    • S
      ppc4xx: Unify AMCC's board config files (part 3/3) · 72675dc6
      Stefan Roese 提交于
      This patch series unifies the AMCC eval board ports by introducing
      a common include header for all AMCC eval boards:
      
      include/configs/amcc-common.h
      
      This header now includes all common configuration options/defines which
      are removed from the board specific headers.
      
      The reason for this is ease of maintenance and unified look and feel
      of all AMCC boards.
      Signed-off-by: NStefan Roese <sr@denx.de>
      72675dc6
  5. 04 6月, 2008 5 次提交
    • H
      SPI API improvements · d255bb0e
      Haavard Skinnemoen 提交于
      This patch gets rid of the spi_chipsel table and adds a handful of new
      functions that makes the SPI layer cleaner and more flexible.
      
      Instead of the spi_chipsel table, each board that wants to use SPI
      gets to implement three hooks:
        * spi_cs_activate(): Activates the chipselect for a given slave
        * spi_cs_deactivate(): Deactivates the chipselect for a given slave
        * spi_cs_is_valid(): Determines if the given bus/chipselect
          combination can be activated.
      
      Not all drivers may need those extra functions however. If that's the
      case, the board code may just leave them out (assuming they know what
      the driver needs) or rely on the linker to strip them out (assuming
      --gc-sections is being used.)
      
      To set up communication parameters for a given slave, the driver needs
      to call spi_setup_slave(). This returns a pointer to an opaque
      spi_slave struct which must be passed as a parameter to subsequent SPI
      calls. This struct can be freed by calling spi_free_slave(), but most
      driver probably don't want to do this.
      
      Before starting one or more SPI transfers, the driver must call
      spi_claim_bus() to gain exclusive access to the SPI bus and initialize
      the hardware. When all transfers are done, the driver must call
      spi_release_bus() to make the bus available to others, and possibly
      shut down the SPI controller hardware.
      
      spi_xfer() behaves mostly the same as before, but it now takes a
      spi_slave parameter instead of a spi_chipsel function pointer. It also
      got a new parameter, flags, which is used to specify chip select
      behaviour. This may be extended with other flags in the future.
      
      This patch has been build-tested on all powerpc and arm boards
      involved. I have not tested NIOS since I don't have a toolchain for it
      installed, so I expect some breakage there even though I've tried
      fixing up everything I could find by visual inspection.
      
      I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and
      DataFlash drivers posted as a follow-up. I'd like some help testing
      other boards that use the existing SPI API.
      
      But most of all, I'd like some comments on the new API. Is this stuff
      usable for everyone? If not, why?
      
      Changed in v4:
        - Build fixes for various boards, drivers and commands
        - Provide common struct spi_slave definition that can be extended by
          drivers
        - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
        - Make default bus and mode build-time configurable
        - Override default SPI bus ID and mode on mx32ads and imx31_litekit.
      
      Changed in v3:
        - Add opaque struct spi_slave for controller-specific data associated
          with a slave.
        - Add spi_claim_bus() and spi_release_bus()
        - Add spi_free_slave()
        - spi_setup() is now called spi_setup_slave() and returns a
          struct spi_slave
        - soft_spi now supports four SPI modes (CPOL|CPHA)
        - Add bus parameter to spi_setup_slave()
        - Convert the new i.MX32 SPI driver
        - Convert the new MC13783 RTC driver
      
      Changed in v2:
        - Convert the mpc8xxx_spi driver and the mpc8349emds board to the
          new API.
      Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
      Tested-by: NGuennadi Liakhovetski <lg@denx.de>
      d255bb0e
    • S
      ppc4xx: Remove implementations of testdram() · 3c1de1a6
      Stefan Roese 提交于
      This patch removes the used testdram() implementations of the board
      that are maintained by myself.
      Signed-off-by: NStefan Roese <sr@denx.de>
      3c1de1a6
    • S
      ppc4xx: Remove superfluous dram_init() call or replace it by initdram() · bbeff30c
      Stefan Roese 提交于
      Historically the 405 U-Boot port had a dram_init() call in early init
      stage. This function was still called from start.S and most of the time
      coded in assembler. This is not needed anymore (since a long time) and
      boards should implement the common initdram() function in C instead.
      
      This patch now removed the dram_init() call from start.S and removes the
      empty implementations that are scattered through most of the 405 board
      ports. Some older board ports really implement this dram_init() though.
      These are:
      
      csb272
      csb472
      ERIC
      EXBITGEN
      W7OLMC
      W7OLMG
      
      I changed those boards to call this assembler dram_init() function now
      from their board specific initdram() instead. This *should* work, but please
      test again on those platforms. And it is perhaps a good idea that those
      boards use some common 405 SDRAM initialization code from cpu/ppc4xx at
      some time. So further patches welcome here.
      Signed-off-by: NStefan Roese <sr@denx.de>
      bbeff30c
    • S
      ppc4xx: Change Kilauea to use the common DDR2 init function · ec724f88
      Stefan Roese 提交于
      This patch changes the kilauea and kilauea_nand (for NAND booting)
      board port to not use a board specific DDR2 init routine anymore. Now
      the common code from cpu/ppc4xx is used.
      
      Thanks to Grant Erickson for all his basic work on this 405EX early
      bootup.
      Signed-off-by: NStefan Roese <sr@denx.de>
      ec724f88
    • G
      ppc4xx: Enable Primordial Stack for 40x and Unify ECC Handling · 8a24c07b
      Grant Erickson 提交于
      This patch (Part 2 of 2):
      
      * Rolls up a suite of changes to enable correct primordial stack and
        global data handling when the data cache is used for such a purpose
        for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS).
      
      * Related to the first, unifies DDR2 SDRAM and ECC initialization by
        eliminating redundant ECC initialization implementations and moving
        redundant SDRAM initialization out of board code into shared 4xx
        code.
      
      * Enables MCSR visibility on the 405EX(r).
      
      * Enables the use of the data cache for initial RAM on
        both AMCC's Kilauea and Makalu and removes a redundant
        CFG_POST_MEMORY flag from each board's CONFIG_POST value.
      
        - Removed, per Stefan Roese's request, defunct memory.c file for
          Makalu and rolled sdram_init from it into makalu.c.
      
      With respect to the 4xx DDR initialization and ECC unification, there
      is certainly more work that can and should be done (file renaming,
      etc.). However, that can be handled at a later date on a second or
      third pass. As it stands, this patch moves things forward in an
      incremental yet positive way for those platforms that utilize this
      code and the features associated with it.
      Signed-off-by: NGrant Erickson <gerickson@nuovations.com>
      Signed-off-by: NStefan Roese <sr@denx.de>
      8a24c07b
  6. 21 5月, 2008 1 次提交
    • W
      Big white-space cleanup. · 53677ef1
      Wolfgang Denk 提交于
      This commit gets rid of a huge amount of silly white-space issues.
      Especially, all sequences of SPACEs followed by TAB characters get
      removed (unless they appear in print statements).
      
      Also remove all embedded "vim:" and "vi:" statements which hide
      indentation problems.
      Signed-off-by: NWolfgang Denk <wd@denx.de>
      53677ef1
  7. 19 5月, 2008 1 次提交
    • S
      ppc4xx: Canyonlands: Disable PCIe0/SATA in dev-tree depending on selection · 16bedc66
      Stefan Roese 提交于
      When SATA is selected (via jumper J6) we need to disable the first PCIe
      node in the device tree, so that Linux doesn't initialize it. Otherwise
      the Linux SATA driver will fail to detect the devices.
      
      The same goes the other way around too. So if PCIe is selected we need
      to disable the SATA node in the device tree.
      
      This is because PCIe port 0 and SATA on 460EX share the same pins
      (multiplexed) and we have to configure in U-Boot which peripheral is
      enabled.
      Signed-off-by: NStefan Roese <sr@denx.de>
      16bedc66
  8. 14 5月, 2008 3 次提交
  9. 08 5月, 2008 2 次提交
  10. 28 4月, 2008 2 次提交
  11. 18 4月, 2008 2 次提交
  12. 02 4月, 2008 1 次提交
  13. 28 3月, 2008 1 次提交
  14. 27 3月, 2008 3 次提交
  15. 15 3月, 2008 4 次提交
  16. 07 3月, 2008 1 次提交
  17. 25 2月, 2008 1 次提交
  18. 16 2月, 2008 1 次提交
  19. 23 1月, 2008 1 次提交
  20. 17 1月, 2008 1 次提交
  21. 16 1月, 2008 1 次提交
  22. 14 1月, 2008 1 次提交
  23. 13 1月, 2008 2 次提交
    • W
      Makalu: fix compile warning · 6eb3fb15
      Wolfgang Denk 提交于
      Signed-off-by: NWolfgang Denk <wd@denx.de>
      6eb3fb15
    • W
      Fix linker scripts: add NOLOAD atribute to .bss/.sbss sections · 64134f01
      Wolfgang Denk 提交于
      With recent toolchain versions, some boards would not build because
      or errors like this one (here for ocotea board when building with
      ELDK 4.2 beta):
      ppc_4xx-ld: section .bootpg [fffff000 -> fffff23b] overlaps section .bss [fffee900 -> fffff8ab]
      
      For many boards, the .bss section is big enough that it wraps around
      at the end of the address space (0xFFFFFFFF), so the problem will not
      be visible unless you use a 64 bit tool chain for development. On
      some boards however, changes to the code size (due to different
      optimizations) we bail out with section overlaps like above.
      
      The fix is to add the NOLOAD attribute to the .bss and .sbss
      sections, telling the linker that .bss does not consume any space in
      the image.
      Signed-off-by: NWolfgang Denk <wd@denx.de>
      64134f01