- 07 10月, 2016 40 次提交
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由 Keerthy 提交于
Cache configuration methods is different for LPAE and non-LPAE cases. Hence the bits and the interpretaion is different for two cases. In case of non-LPAE mode short descriptor format is used and we need to set Cache and Buffer bits. In the case of LPAE the cache configuration happens via MAIR0 lookup. Signed-off-by: NKeerthy <j-keerthy@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Keerthy 提交于
As of now the mmu section shift is hardcoded to 20 but with LPAE coming into picture this can be different. Hence replacing 20 with MMU_SECTION_SHIFT macro. Signed-off-by: NKeerthy <j-keerthy@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Robert P. J. Day 提交于
Signed-off-by: NRobert P. J. Day <rpjday@crashcourse.ca> Acked-by: NHeiko Schocher <hs@denx.de>
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由 Adam Oleksy 提交于
These functions are needed in UBI/UBIFS on ZynqMP platform (ARM64). Signed-off-by: NAdam Oleksy <adam.oleksy@nokia.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
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由 Ladislav Michl 提交于
An attempt to write non block aligned data fails silently, add warning and set result. Signed-off-by: NLadislav Michl <ladis@linux-mips.org>
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由 Robert P. J. Day 提交于
Tweaks (no functional changes) to include/search.h, including: * use standard multiple inclusion check * fix spelling mistakes * have comments match actual names in function prototypes * remove obsolete reference to "do_apply" * replace "hashing table" with "hash table" Signed-off-by: NRobert P. J. Day <rpjday@crashcourse.ca>
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由 Robert P. J. Day 提交于
Fix various misspellings of: * deprecated * partition * preceding,preceded * preparation * its versus it's * export * existing * scenario * redundant * remaining * value * architecture Signed-off-by: NRobert P. J. Day <rpjday@crashcourse.ca> Reviewed-by: NJagan Teki <jteki@openedev.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Hou Zhiqiang 提交于
When enabled sec firmware framework, but lack of definition of the marco SEC_FIRMWARE_FIT_IMAGE, SEC_FIRMEWARE_FIT_CNF_NAME and SEC_FIRMWARE_TARGET_EL, there will be some build errors, so give a default definition. Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
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由 Siarhei Siamashka 提交于
The SPL and U-Boot proper may use different initial stack locations, which are configured via CONFIG_SPL_STACK and CONFIG_SYS_INIT_SP_ADDR defines. The lowlevel_init.S code needs to handle this in the same way as crt0.S Without this fix, setting the U-Boot stack location to some place, which is not safely accessible by the SPL (such as the DRAM), causes a very early SPL deadlock. Signed-off-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Andreas Fenkart 提交于
Suspected Spam: Do not open attachements![PATCH 4/6] tools/env: flash_write_buf: enforce offset to be start of environment This allows to take advantage of the environment being block aligned. This is not a new constraint. Writes always start at the begin of the environment, since the header with CRC/length as there. Every environment modification requires updating the header Signed-off-by: NAndreas Fenkart <andreas.fenkart@digitalstrom.com>
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由 Andreas Fenkart 提交于
flash_write_buf already looks up size/offset/#sector from struct envdev_s. It can look up mtd_type as well. Same applies to flash_read_buf. Makes the interface simpler Signed-off-by: NAndreas Fenkart <andreas.fenkart@digitalstrom.com>
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由 Andreas Fenkart 提交于
the offset is not modified by linux ioctl call see mtd_ioctl{drivers/mtd/mtdchar.c} Makes the interface less ambiguous, since the caller can now exclude a modification of blockstart Signed-off-by: NAndreas Fenkart <andreas.fenkart@digitalstrom.com>
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由 Andreas Fenkart 提交于
instead of adhoc computation of the environment end, use a function with a proper name Signed-off-by: NAndreas Fenkart <andreas.fenkart@digitalstrom.com>
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由 Clemens Gruber 提交于
When using gzwrite to eMMC on an i.MX6Q board, the following warning occurs repeatedly: CACHE: Misaligned operation at range [4fd63318, 4fe63318] This patch cache-aligns the memory allocation for the gzwrite writebuf, therefore avoiding the misaligned dcache flush and the warning from check_cache_range. Signed-off-by: NClemens Gruber <clemens.gruber@pqgruber.com> Reviewed-by: NEric Nelson <eric@nelint.com> Reviewed-by: NStefan Agner <stefan.agner@toradex.com>
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由 Simon Glass 提交于
This should be CONFIG_SYS_MAX_NAND_DEVICE. Fix it. Signed-off-by: NSimon Glass <sjg@chromium.org> Acked-by: NScott Wood <oss@buserror.net> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Simon Glass 提交于
This option is not used now. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Simon Glass 提交于
The only content of this file is CONFIG options which are no-longer present in U-Boot. Drop it. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Simon Glass 提交于
This issue covered by this doc appears to be fixed, so let's remove the README. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NYork Sun <york.sun@nxp.com> Acked-by: NAndreas Bießmann <andreas@biessmann.org>
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由 Simon Glass 提交于
This is not used in U-Boot so drop it. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Simon Glass 提交于
This appears to be calculated automatically now. Drop the old reference. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Simon Glass 提交于
CONFIG_SYS_NUM_I2C_ADAPTERS and CONFIG_SYS_I2C_MULTI_NOPROBES are not used in U-Boot, so drop them. Signed-off-by: NSimon Glass <sjg@chromium.org> Acked-by: NHeiko Schocher <hs@denx.de> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Simon Glass 提交于
This is not used in U-Boot. Drop both the BASE and the SIZE config. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Simon Glass 提交于
This is not used in U-Boot. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Simon Glass 提交于
This is not used in U-Boot. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Simon Glass 提交于
This is not used in U-Boot. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Simon Glass 提交于
Drop a few that are not used in U-Boot. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Simon Glass 提交于
There appear to be neither implemented nor used. Drop them. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Simon Glass 提交于
Change this to CONFIG_ENV_OFFSET_REDUND. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Simon Glass 提交于
These are no-longer present in U-Boot. Drop them. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Simon Glass 提交于
This is no longer in the U-Boot source code, so drop this note from the README. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Simon Glass 提交于
There is no need for this to be in the BSS region. By moving it we can delay use of BSS in SPL. This is useful for machines where the BSS region is not in writeable space. On 64-bit x86, SPL runs from SPI flash and it is easier to eliminate BSS use than link SPL to run with BSS at a particular cache-as-RAM (CAR) address. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Simon Glass 提交于
Upda the SPL FIT code to use the spl_image parameter. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Simon Glass 提交于
Update the fat loader to avoid using the spl_image global variable. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Simon Glass 提交于
Update the ext loader to avoid using the spl_image global variable. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Simon Glass 提交于
Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Simon Glass 提交于
Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Simon Glass 提交于
Add a linker list declaration for this method and remove the explicit switch() code. We need two variants - one for BOOT_DEVICE_CPGMAC and one for BOOT_DEVICE_USBETH. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Simon Glass 提交于
At present there are two SPI functions only used by freescale which are defined in the spi_flash.h header. One function name matches an existing generic SPL function. Move these into a private header to avoid confusion. Arcturus looks like it does not actually support SPI, so drop the SPI code from that board. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Simon Glass 提交于
Add a linker list declaration for this method and remove the explicit switch() code. Also set up the sunxi function. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Simon Glass 提交于
All the other SPL loaders are in this directory, so move the SPI one in there too. There are two board-specific SPI loaders (fsl and sunxi). These remain in the drivers/mtd/spi directory, since they do not contain generic code. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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