Like many platforms, the Altera socfpga platform requires that the
preloader be "signed" in a certain way or the built-in boot ROM will
not boot the code.

This change automatically creates an appropriately signed preloader
from an SPL image.

The signed image includes a CRC which must, of course, be generated
with a CRC generator that the SoCFPGA boot ROM agrees with otherwise
the boot ROM will reject the image.

Unfortunately the CRC used in this boot ROM is not the same as the
Adler CRC in lib/crc32.c. Indeed the Adler code is not technically a
CRC but is more correctly described as a checksum.

Thus, the appropriate CRC generator is added to lib/ as crc32_alt.c.
Signed-off-by: NCharles Manning <cdhmanning@gmail.com>
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: NPavel Machek <pavel@denx.de>

V2: - Zap unused constant
    - Explicitly print an error message in case of error
    - Rework the hdr_checksum() function to take the *header directly
      instead of a plan buffer pointer

Some of the #defines in spi.h are not bracketed. To avoid future mistakes
add brackets. Also add an explanatory comment for SPI_CONN_DUAL_...
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>

In preparation for changing the error handling in this code for driver
model, move it into its own function.
Reviewed-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: NSimon Glass <sjg@chromium.org>

Sandbox may as well support everything. This increases the amount of code
that is built/tested by sandbox, and also provides access to all the
supported SPI flash devices.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>

At present sandbox has its own table of supported SPI flash chips. Now that
the SPI flash system is fully consolidated and has its own list, sandbox
should use that.

This enables us to expand the number of chips that sandbox supports.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>

The patch "nand/denali: Adding Denali NAND driver support"
introduced two config symbols without documenting them.
Signed-off-by: NScott Wood <scottwood@freescale.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>

To add the Denali NAND driver support into U-Boot.
This driver is leveraged from Linux with commit ID
fdbad98dff8007f2b8bee6698b5d25ebba0471c9. For Denali
controller 64 variance, you need to declare macro
CONFIG_SYS_NAND_DENALI_64BIT.
Signed-off-by: NChin Liang See <clsee@altera.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

The ioread16_rep() and iowrite16_rep() implementations are U-Boot specific
and have been introduced with the Linux MTD v3.14 sync. While introducing
these functions, the length for the loop has been miscalculated. The ">> 1"
is already present in the caller. So lets remove it in the function.

Tested on omap3_ha.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Scott Wood <scottwood@freescale.com>
Acked-by: NHeiko Schocher <hs@denx.de>

OMAP GPMC driver used with some NAND Flash devices
(e.g. Spansion S34ML08G1) causes that U-boot shows
hundreds of 'nand: bit-flip corrected' error messages.
Possible cause was discussed in the mailinglist thread:
http://lists.denx.de/pipermail/u-boot/2014-April/177508.html

The issue was partially fixed with the cc81a529.git
however this has to be done to fix the SPL.

The original author of the code is Belisko Marek
<marek.belisko@gmail.com>
Signed-off-by: NRostislav Lisovy <lisovy@merica.cz>

With some versions of gcc (that we know of 4.6.3 and 4.8.2 are affected)
it is necessary to specify --bss-plt to get the final blrl in the
_GOT2_TABLE_. Without this the last symbol does not get it's address
relocated.  For the P2041RDB board this ended up being
NetArpWaitTimerStart which caused the ARP packets to timeout
immediately.
Signed-off-by: NJoakim Tjernlund <joakim.tjernlund@transmode.se>
Signed-off-by: NChris Packham <judge.packham@gmail.com>
Acked-by: NJoakim Tjernlund <joakim.tjernlund@transmode.se>
Acked-by: NScott Wood <scottwood@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

LS1021AQDS has a variant with DDR4 slot. This patch adds a new defconfig
for this variant to enable DDR4 support. RAW timing parameters are not
added for DDR4. The board timing parameters are only tuned for single-
rank 1600 and 1800MT/s with Micron DIMM 9ASF51272AZ-2G1A1 due to DIMM
availability.
Signed-off-by: NYork Sun <yorksun@freescale.com>
CC: Alison Wang <alison.wang@freescale.com>

When accumulated ECC is enabled, the DQ_MAP for ECC[4:7] needs to be set
to 0, i.e. 0->0, 1->1, etc., required by controller logic, even these pins
are not actually connected.

Also fix a bug when reading from DDR register to use proper accessor for
correct endianess.
Signed-off-by: NYork Sun <yorksun@freescale.com>

When booting with SP, RCW resides at the beginning of IFC NOR flash.
Signed-off-by: NYork Sun <yorksun@freescale.com>

Spin table is at the very beginning of boot code. Each core has an individual
release address within the spin table, the ft_cpu_setup fn updates the
"cpu-release-addr" property of each cpu node with the corresponding release
address.

Also fix CPU_RELEASE_ADDR to point to secondary_boot_func.
Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NArnab Basu <arnab.basu@freescale.com>

Secondary cores need to be released from holdoff by boot release
registers. With GPP bootrom, they can boot from main memory
directly. Individual spin table is used for each core. Spin table
and the boot page is reserved in device tree so OS won't overwrite.
Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NArnab Basu <arnab.basu@freescale.com>

of_bus_default_count_cells can be used to get the #address-cells
and #size-cells defined by the current node's parent node. This
is required when using of_read_number to read from FDT nodes that
can be 32 or 64 bytes depending on values defined by the parent.
Signed-off-by: NArnab Basu <arnab.basu@freescale.com>
CC: Scott Wood <scottwood@freescale.com>

This is being done so that it can be used outside 'fdt_support.c'. Making
life more convenient when reading device node properties that can be 32
or 64 bits long.
Signed-off-by: NArnab Basu <arnab.basu@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>

The driver was written using old DDR3 spec which only covers low speeds.
The value would be suboptimal for higher speeds. Fix both timing according
to latest DDR3 spec, remove tCKE as an config option.
Signed-off-by: NYork Sun <yorksun@freescale.com>

DP-DDR is used for DPAA, separated from main memory pool for general
use. It has 32-bit bus width and use a standard DDR4 DIMM (64-bit).
Signed-off-by: NYork Sun <yorksun@freescale.com>

U-boot has been initializing DDR for the main memory. The presumption
is the memory stays as a big continuous block, either linear or
interleaved. This change is to support putting some DDR controllers
to separated space without counting into main memory. The standalone
memory controller could use different number of DIMM slots.
Signed-off-by: NYork Sun <yorksun@freescale.com>

Add support of NOR and NAND flash for simulator target.
Here
  IFC - CS0: NOR flash
  IFC - CS1: NAND flash
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

Freescale's flash control driver is using architecture specific timer API
i.e. usec2ticks

Replace usec2ticks with get_timer() (generic timer API)
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: NScott Wood <scottwood@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

Pick the following commit from Linux kernel:
commit 66cb4ee0e52ca721f609fd5eec16187189ae5fda
Author: Joe Perches <joe@perches.com>
Date:   Wed Sep 10 09:40:47 2014 +1000

checkpatch: remove unnecessary + after {8,8}

There's a useless "+" use that needs to be removed as perl 5.20 emits a
"Useless use of greediness modifier '+'" message each time it's hit.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Tom Rini <trini@ti.com>

This option specifies the default Device Tree used for the run-time
configuration of U-Boot.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Michal Simek <michal.simek@xilinx.com>

This commit moves:
  CONFIG_OF_CONTROL
  CONFIG_OF_SEPARATE
  CONFIG_OF_EMBED
  CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: NMichal Simek <michal.simek@xilinx.com>

This tools is unnecessary since commit f6c8f38e
(tools/genboardscfg.py: improve performance more with Kconfiglib).
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

The mentioned binutils port got removed while the patch was
pending. As Ian pointed out there is another port providing
the binutils for arm now. Update the instructions accordingly.

Cc: ian@FreeBSD.org
Cc: Tom Rini <trini@ti.com>
Signed-off-by: NJeroen Hofstee <jeroen@myspectrum.nl>

The libc headers on FreeBSD and likely related projects as well contain an
header file, cdefs.h which provides similiar functionality as linux/compiler.h.
It provides compiler independent defines like __weak __packed, to allow
compiling with multiple compilers which might have a different syntax for such
extension.

Since that header file is included in multiple standard headers, like stddef.h
and stdarg.h, multiple definitions of those defines will be present if both are
included. When compiling u-boot the compiler will warn about it hundreds of
times since e.g. common.h will include both files indirectly.

commit 7ea50d52 "compiler_gcc: do not redefine
__gnu_attributes" prevented such redefinitions, but this was undone by commit
fb8ffd7c "compiler*.h: sync
include/linux/compiler*.h with Linux 3.16".

Add the checks back where necessary to prevent such warnings.

As the original patch this checkpatch warning is ignored:
"WARNING: Adding new packed members is to be done with care"

Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: NJeroen Hofstee <jeroen@myspectrum.nl>
Acked-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

[1] Move driver/core/, driver/input/ and drivers/input/ entries
    from the top Makefile to drivers/Makefile

[2] Remove the conditional by CONFIG_DM in drivers/core/Makefile
    because the whole drivers/core directory is already selected
    by CONFIG_DM in the upper level

[3] Likewise for CONFIG_DM_DEMO in drivers/demo/Makefile

[4] Simplify common/Makefile - both CONFIG_DDR_SPD and
    CONFIG_SPD_EEPROM are boolean macros so they can directly
    select objects
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: NMarek Vasut <marex@denx.de>

Now MIN, MAX, MIN3, MAX are not used.
Going forward, use min, max, min3, max3.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

The macro MIN, MAX is defined as the aliase of min, max,
respectively.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

Since clang has a different definition for uninitialized_var
it will complain that it is redefined in include/compiler.h.
Since these are already defined in linux/compiler.h just remove
this instance.

Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: NJeroen Hofstee <jeroen@myspectrum.nl>

The arg_off() and arg_off_size() update the 'current NAND
device' variable (dev). This is then used when assigning the
(nand_info_t*)nand value. Place the assignment after the
arg_off(_size) calls to prevent using incorrect (nand_info_t*)
nand value.
Signed-off-by: NRostislav Lisovy <lisovy@merica.cz>

The section name and the C variable name seem to be opposite.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: NMarek Vasut <marex@denx.de>

Now config_cmd_defaults.h is empty so it can be deleted safely.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: NSimon Glass <sjg@chromium.org>

Since CONFIG_CMD_IMPORTENV is defined in config_cmd_defaults.h,
it should be enabled for all the boards except bf506f-ezkit
that undefs it explicitely.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Tested-by: NSimon Glass <sjg@chromium.org>

Since CONFIG_CMD_GO is defined in config_cmd_defaults.h
(and no board undefs it its own header), it can be moved to
Kconfig with the default value "y".
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Tested-by: NSimon Glass <sjg@chromium.org>