- 11 2月, 2021 6 次提交
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https://gitlab.denx.de/u-boot/custodians/u-boot-usb由 Tom Rini 提交于
- MediaTek updates - xhci fixes - dwc2 stm32 compatible update
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由 Patrick Delaunay 提交于
The Linux kernel v5.7-rc1 introduced the compatible "st,stm32mp15-hsotg". See Linux kernel commit d49850110434 ("dt-bindings: usb: dwc2: add support for STM32MP15 SoCs USB OTG HS and FS") This patch updates the supported compatible in DWC2 driver, removes the add-on done in U-Boot dtsi and keeps the compatible defined in SOC dtsi arch/arm/dts/stm32mp151.dtsi: usbotg_hs: usb-otg@49000000 { compatible = "st,stm32mp15-hsotg", "snps,dwc2"; reg = <0x49000000 0x10000>; ... }; Signed-off-by: NPatrick Delaunay <patrick.delaunay@foss.st.com>
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由 Stefan Roese 提交于
Testing with v2021.01 on MIPS Octeon has shown, that the latest patch for the "short packet event trb handling" did introduce a bug on platforms with virtual address != physical address. This patch fixes this issue by using the correct address types in the compare (both physical in this case). Signed-off-by: NStefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Ran Wang <ran.wang_1@nxp.com> Cc: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Cc: Marek Vasut <marex@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com>
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由 Pali Rohár 提交于
Function dm_pci_map_bar() may fail and returns NULL. Check this to prevent dereferencing a NULL pointer. In xhci-pci this may happen when board does not enable CONFIG_PCI_PNP and PCI_BASE_ADDRESS_0 contains unconfigured zero address. Signed-off-by: NPali Rohár <pali@kernel.org>
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由 Chunfeng Yun 提交于
Add optional properies to disable usb2 or usb3 ports, they are used when provided ports are not used on some special platforms. Signed-off-by: NChunfeng Yun <chunfeng.yun@mediatek.com>
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由 Chunfeng Yun 提交于
Add support to disable specific ports, it's useful for some scenarios: 1. usb3 PHY is shared whith PCIe or SATA, the corresponding usb3 port can be disabled; 2. some usb2 or usb3 ports are not used on special platforms, they should be disabled to save power. Signed-off-by: NChunfeng Yun <chunfeng.yun@mediatek.com>
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- 10 2月, 2021 7 次提交
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https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic由 Tom Rini 提交于
- Add configuration helpers for MIPI D-PHY - generic-phy: add configure op - Add Amlogic AXG MIPI D-PHY driver & MIPI PCIe Analog PHY driver - odroid: add runtime detection of the N2/N2+/C4/HC4 variants
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由 Marek Szyprowski 提交于
Use the ADC channel 1 to check the hardware revision of the board and detect the N2 vs. N2+ and the C4 vs. HC4 variants. Each of them use different dtb file, so adjust fdtfile environment variable to the detected variant. The ADC min/max values for each variant are taken from the vendor code, adjusted to the 12-bit ADC driver operation mode (vendor code use 10-bit mode). Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
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由 Neil Armstrong 提交于
The Amlogic AXG MIPI + PCIe Analog PHY provides function for both PCIe and MIPI DSI at the same time, and provides the Analog part of MIPI DSI transmission and Analog part of the PCIe lines. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
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由 Neil Armstrong 提交于
The Amlogic AXG SoCs embeds a MIPI D-PHY used to communicate with DSI panels. This D-PHY depends on a separate analog PHY. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
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由 Neil Armstrong 提交于
Add the PHY configure op callback to the generic PHY uclass to permit configuring the PHY. It's useful for MIPI DSI PHYs to setup the link timings. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
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由 Neil Armstrong 提交于
The MIPI D-PHY spec defines default values and boundaries for most of the parameters it defines. Introduce helpers to help drivers get meaningful values based on their current parameters, and validate the boundaries of these parameters if needed. These helpers and header are taken from Linux commit 9123e3a74ec7 ("Linux 5.9-rc1"). Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
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https://gitlab.denx.de/u-boot/custodians/u-boot-stm由 Tom Rini 提交于
- Enable the fastboot oem commands in stm32mp15 defconfig - Fixes pinctrol for stmfx and stm32 - Add support of I2C6_K in stm32mp15 clock driver - Alignment with Linux kernel device tree v5.11-rc2 for ST boards
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- 09 2月, 2021 11 次提交
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由 Patrick Delaunay 提交于
Device tree alignment with Linux kernel v5.11-rc2 - fix DCMI DMA features on stm32mp15 family - Add alternate pinmux for FMC EBI bus - Harmonize EHCI/OHCI DT nodes name on stm32mp15 - update sdmmc IP version for STM32MP15 - Add LP timer irqs on stm32mp151 - Add LP timer wakeup-source on stm32mp151 - enable HASH by default on stm32mp15 - enable CRC1 by default on stm32mp15 - enable CRYP by default on stm32mp15 - set bus-type in DCMI endpoint for stm32mp157c-ev1 board - reorder spi4 within stm32mp15-pinctrl - add STUSB1600 Type-C using I2C4 on stm32mp15xx-dkx - fix mdma1 clients channel priority level on stm32mp151 - fix dmamux reg property on stm32mp151 - adjust USB OTG gadget fifo sizes in stm32mp151 - update stm32mp151 for remote proc synchronization support - support child mfd cells for the stm32mp1 TAMP syscon Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com> Signed-off-by: NPatrick Delaunay <patrick.delaunay@foss.st.com>
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由 Fabrice GIRARDOT 提交于
The kilohertz unit abbreviation should read 'kHz'. Note to STM32 team: modified files were generated, it may be worth to fix STM32CubeMX tool. Signed-off-by: NFabrice GIRARDOT <fabrice.girardot@flowbird.group> Reviewed-by: NPatrick Delaunay <patrick.delaunay@foss.st.com>
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由 Patrick Delaunay 提交于
Add support of missing I2C6_K with bit 3 of RCC_MC_APB5ENSETR = I2C6EN: I2C6 peripheral clocks enable. This patch allows customer to use I2C6 in SPL or in U-Boot as other I2C instance, already support in clk driver. Signed-off-by: NPatrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: NPatrice Chotard <patrice.chotard@foss.st.com>
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由 Patrick Delaunay 提交于
Bind only the enabled GPIO subnode, to avoid to probe the node "gpio-controller" present in SOC dtsi (disabled by default) but not enabled in the included pincontrol dtsi file. For example, in stm32mp15xxac-pinctrl.dtsi 2 gpio bank are absent: gpioj: gpio@5000b000 gpiok: gpio@5000c000 Then these GPIO are absent in output of command "dm tree" and "gpio status -a" Signed-off-by: NPatrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: NPatrice Chotard <patrice.chotard@foss.st.com>
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由 Patrick Delaunay 提交于
OTYPE can be used for output or for alternate function to select PP = push-pull or OP = open-drain mode, according reference manual (Table 81. Port bit configuration table). This patch removes this indication for input pins and adds it for AF and output pins for pinmux command output. Fixes: b305dbc0 ("pinctrl: stm32: display bias information for all pins") Signed-off-by: NPatrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: NPatrice Chotard <patrice.chotard@foss.st.com>
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由 Patrice Chotard 提交于
Instead of redefining a pin's name size, use PINNAME_SIZE defined in include/dm/pinctrl.h Signed-off-by: NPatrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: NPatrick Delaunay <patrick.delaunay@foss.st.com>
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由 Patrice Chotard 提交于
pin-controller pin's name must be equal to pin's name used in device tree with "pins" DT property. Issue detected on stm32mp157c-ev1 board with goodix touchscreen. In DT, the goodix's pin is declared in DT with the node: goodix_pins: goodix { pins = "gpio14"; bias-pull-down; }; Whereas in stmfx pin-controller driver, pin's name are equal to "stmfx_gpioxx" where xx is the pin number. This lead to not configure stmfx's pins at probe because pins is identified by its name (see pinctrl_pin_name_to_selector() in pinctrl-generic.c) and stmfx pin "gpio14" can't be found. To fix this issue, come back to the original stmfx pin's name. Revert "pinctrl: stmfx: update pin name" This reverts commit 38d30cdcd65c73eeefac5efa328ad444a53b77dd. Signed-off-by: NPatrice Chotard <patrice.chotard@foss.st.com> Tested-by: NPatrick DELAUNAY <patrick.delaunay@st.com> Reviewed-by: NPatrick Delaunay <patrick.delaunay@foss.st.com>
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由 Patrick Delaunay 提交于
Enable the fastboot oem command bootbus, used to configure the eMMC boot behavior, with same format than 'mmc bootbus' and with parameter: boot_bus_width reset_boot_bus_width boot_mode On stm32mp1 boards the expected command is $> fastboot oem partconf:0 0 0 Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com> Reviewed-by: NPatrice Chotard <patrice.chotard@st.com>
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由 Patrick Delaunay 提交于
Enable the fastboot oem command partconf, used to select the correct eMMC boot partition, with same format than 'mmc partconf' with parameter: boot_ack boot_partition On stm32mp1 family: - boot_ack = 1 (Boot Acknowledge is needed by ROM code) - boot_partition = 1 or 2 (Boot partition 1 / 2 enabled for boot) So on EV1 board the expected commands to select boot partition 1 or 2 $> fastboot oem partconf:1 1 $> fastboot oem partconf:1 2 Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com> Reviewed-by: NPatrice Chotard <patrice.chotard@st.com>
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由 Jean-Philippe ROMAIN 提交于
Enable the fastboot oem command format and set the variable "partitions" with default eMMC partitions list. Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com> Signed-off-by: NJean-Philippe ROMAIN <jean-philippe.romain@st.com> Reviewed-by: NPatrice Chotard <patrice.chotard@st.com>
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由 Jean-Philippe ROMAIN 提交于
Activate fastboot support on boot partition for eMMC, mmc1 device on STMicroelectronics board (EV1). Signed-off-by: NJean-Philippe ROMAIN <jean-philippe.romain@st.com> Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com> Reviewed-by: NPatrice Chotard <patrice.chotard@st.com>
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- 08 2月, 2021 16 次提交
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git://git.denx.de/u-boot-marvell由 Tom Rini 提交于
- Espressobin: Set default env values at runtime (Pali) - Espressobin: Set the maximum slave SPI speed to 40MHz (Pali) - theadorable: PCIe test code enhancement and early deemphasis enabling (Stefan) - pci_mvebu: Disable config access to PCI host bridge ports (Stefan) - mv_sdhci: parse device-tree entry (Baruch)
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git://git.denx.de/u-boot-fsl-qoriq由 Tom Rini 提交于
Layerscape: Enable gpio Bug fixes & updates related to dspi, qspi, pciep, SVR mask, stream-id, env variables, mdio for LAyerscape Platforms Add SATA, network variant 1, 2 support on sl28 powerpc: T1042: drop CONFIG_VIDEO, Add kmcent2 board supporrt, keymile Bug fixes and updates for keymile, Kontron
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由 Biwen Li 提交于
Enable CMD_GPIO for board lx2160aqds Signed-off-by: NBiwen Li <biwen.li@nxp.com> Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Biwen Li 提交于
Enable CMD_GPIO for board lx2160ardb Signed-off-by: NBiwen Li <biwen.li@nxp.com> Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Biwen Li 提交于
Enable DM_GPIO and CMD_GPIO for board ls1088ardb Signed-off-by: NBiwen Li <biwen.li@nxp.com> Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Biwen Li 提交于
Enable DM_GPIO and CMD_GPIO for board ls1088aqds Signed-off-by: NBiwen Li <biwen.li@nxp.com> Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Biwen Li 提交于
Enable CMD_GPIO for board ls2088aqds Signed-off-by: NBiwen Li <biwen.li@nxp.com> Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Biwen Li 提交于
Enable DM_GPIO and CMD_GPIO for board ls2088ardb Signed-off-by: NBiwen Li <biwen.li@nxp.com> Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Biwen Li 提交于
Enable CMD_GPIO for board ls1046aqds Signed-off-by: NBiwen Li <biwen.li@nxp.com> Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Biwen Li 提交于
Enable CMD_GPIO for board ls1046ardb Signed-off-by: NBiwen Li <biwen.li@nxp.com> Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Biwen Li 提交于
Enable CMD_GPIO for board ls1043ardb Signed-off-by: NBiwen Li <biwen.li@nxp.com> Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Biwen Li 提交于
Enable CMD_GPIO for board ls1043aqds Signed-off-by: NBiwen Li <biwen.li@nxp.com> Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Biwen Li 提交于
Enable CMD_GPIO for board ls1028ardb Signed-off-by: NBiwen Li <biwen.li@nxp.com> Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
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由 Biwen Li 提交于
Enable CMD_GPIO for board ls1028aqds Signed-off-by: NBiwen Li <biwen.li@nxp.com> Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>
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