CONFIG_CONSOLE_CURSOR, CONFIG_SYS_CONSOLE_BLINK_COUNT and
CONFIG_CONSOLE_TIME are not used by any board. The implementation is not
great and stands in the way of a refactor of i8042. Drop these for now.
They can be re-introduced quite easily later, perhaps with driver-model
real-time-clock (RTC) support.

When reintroducing, it might be useful to make a few changes:
- Blink time would be more useful than blink count
- The confusing #ifdefs should be avoided
- The time functions should support driver model
- It would be best keyed off console_tstc() or some similar idle loop
    rather than a particular input driver (i8042 in this case)
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

Adjust the cros_ec keyboard driver to support driver model. Make this the
default for all Exynos boards so that those that use a keyboard will build
correctly with this driver.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Adjust the tegra keyboard driver to support driver model, using the new
uclass. Make this the default for all Tegra boards so that those that use
a keyboard will build correctly with this driver.
Signed-off-by: NSimon Glass <sjg@chromium.org>

When driver model is used for keyboards we must scan the available keyboards
and register them with stdio. Add code to do this.

At some point (once LCD/video is converted) we should be able to convert
stdio to driver model and avoid these dual data structures.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

In preparation for converting the cros_ec keyboard driver to driver model,
adjust the cros_ec functions it will use to use a normal struct udevice.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Require the caller to add the keycode translation tables separately so that
it can select which ones to use. In a later patch we will add the option to
add German tables.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

Return a useful error instead of -1 when something goes wrong.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

The read_keys() method in input is passed a struct input_config. Add a
device pointer there so that we can find out the device that is referred
to with driver model.

Once all drivers are converted we can update the input structure to use
driver model instead.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

Add a uclass for keyboard input, mirroring the existing stdio methods.
This is enabled by a new CONFIG_DM_KEYBOARD option.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NMarek Vasut <marex@denx.de>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

Switch USB keyboards over to use driver model instead of scanning with the
horrible usb_get_dev_index() function. This involves creating a new uclass
for keyboards, although so far there is no API.
Signed-off-by: NSimon Glass <sjg@chromium.org>

No UART driver was specified in defconfig, thus
DEBUG_UART_ALTERA_JTAGUART was incorrectly selected by default since
commit 220e8021 added a new Altera UART
driver.
Signed-off-by: NAriel D'Alessandro <ariel@vanguardiasur.com.ar>
Acked-by: NSimon Glass <sjg@chromium.org>

Phy can have addresses 0-31. Check this boundary to ensure that user
can't call commands on phy address 32 and more.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

zc1571 with silicon can operate on 200MHz maximum frequency. Setup this
frequency by default and fix setting for ep108.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Based on spec:
"MDC must not exceed 2.5 MHz (MDC is only active during MDIO read and
write operations)"
Zynq is running on 111MHz. Current setting is 32 which is 111/32=3.47
which is above of 2.5MHz.
Using 48 divider will give us correct setting according spec
(111/48=2.31).
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Driver cleanup.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Using set and clear macro is incorrect because it is not overwritting
origin mdc clock division setup.
For example origin setup is 8(0b001) and new setup is 64(0b100) which
means 0b101 is setup which is 96 divider.
Using writel to rewrite all setting like for 1000Mbit/s case.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Wait till BD is processed to ensure that packet was sent successfully.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Zynq has no priority queues.
ZynqMP has one priority queue and this change is required
to get ethernet working.
This patch was not needed on ep108 for uknown reason even
it should be used.
Tested on Zynq and ZynqMP.
Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Target is duplicating packets. IP prefetches another BD and process it
when the first one is sent. Adding one dummy BD to the chain fix the
problem with packet duplication.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Fix incorrect sequence in BD handling.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

BD_SEPRN_SPACE should not have hard coded value and it will be
calculated based on the number of buffer descriptors that we
would like to use.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

It is follow up patch based on
"dm: Add support for all targets which requires MANUAL_RELOC"
(sha1: 484fdf5b)
to update function pointers for DM.

Using post_bind is not ideal but it is one on current option what can be
used. Variable reloc_done has to be used do not call relocation after
every bind. Maybe new core functions should be introduced for this case.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Patches:
"dm: core: Add a post_bind method for parents"
(sha1: 0118ce79)
"dm: core: Add a uclass pre_probe() method for devices"
(sha1: 02c07b37)
"dm: core: Allow the uclass to set up a device's child after binding"
(sha1: 081f2fcb)
"dm: core: Allow uclass to set up a device's child before it is probed"
(sha1: 83c7e434)

Adds new entries to struct driver and struct uclass_driver without
extending code for manual relocation. This patch fixes it for all
architectures which requires MANUAL_RELOC.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Acked-by: NSimon Glass <sjg@chromium.org>

It is follow up patch based on
"dm: Add support for all targets which requires MANUAL_RELOC"
(sha1: 484fdf5b)
to update function pointers for DM.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Acked-by: NSimon Glass <sjg@chromium.org>

'extern inline' is not portable across various C standards. To ensure
compatiblity with various standards/compilers change the functions to
static inline. This is a portable construct and serves as a comparable
definition to 'extern inline' from the gnu90 standard.

Additionally remove the function prototypes as they are not required due
to the functions being declared static and functions are correctly
ordered based on dependence.
Signed-off-by: NNathan Rossi <nathan@nathanrossi.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: NMans Rullgard <mans@mansr.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Fix various style issues in MicroBlaze header files. Specifically fixing
style voilations including '__inline__', 'foo * bar' and 'void foo ('.
Signed-off-by: NNathan Rossi <nathan@nathanrossi.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Previous loop was completely bogus. Iterration should go just over
statistic counters.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Extend comments with register offset to help with debuggging.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

MII is setup by default for all cases. The most of boards are using
RGMII but PHY drivers are not doing any specific setting that's why MII
setting was working fine. With TI DP83867 is necessary to setup
paramaters based on interface type.

Use one setting per board for it which is something what will be removed
when driver is moved to DM.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Add debug messages to phyread/write to help with PHY debug.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Add a build target to generate 'boot.bin' which includes SPL. This is
used by the platforms BootROM to load SPL directly.

This change also conditionally changes what the 'boot.bin' target
generates depending on the SoC. Leaving the behaviour unchanged for the
AT91 targets.
Signed-off-by: NNathan Rossi <nathan@nathanrossi.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NTom Rini <trini@konsulko.com>

As with other platforms vendors love to create their own boot header
formats. Xilinx is no different and for the Zynq platform/SoC there
exists the "boot.bin" which is read by the platforms bootrom. This
format is described to a useful extent within the Xilinx Zynq TRM.

This implementation adds support for the 'zynqimage' to mkimage. The
implementation only considers the most common boot header which is
un-encrypted and packed directly after the boot header itself (no
XIP, etc.). However this implementation does take into consideration the
other fields of the header for image dumping use cases (vector table and
register initialization).
Signed-off-by: NNathan Rossi <nathan@nathanrossi.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Enable TI phy for Xilinx ZynqMP platform.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Code is taken from Linux kernel driver (v4.2).
Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

OF_CONTROL is enabled by default for all Zynq boards.
The difference between two boot images is done by OF_SEPARATE
or OF_EMBED macros.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

Put jump trampoline to TCM at 0 and setup R5 reset address to 0.
Jump trampoline ensures that jump to the right location.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>