This patch adds a small printf() version that supports all basic formats.
Its intented to be used in U-Boot SPL versions on platforms with very
limited internal RAM sizes.

To enable it, just define CONFIG_USE_TINY_PRINTF in your defconfig. This
will result in the SPL using this tiny function and the main U-Boot
still using the full-blown printf() function.

This code was copied from:
http://www.sparetimelabs.com/printfrevisited
With mostly only coding style related changes so that its checkpatch
clean.

The size reduction is about 2.5KiB. Here a comparison for the db-mv784mp-gp
(Marvell AXP) SPL:

Without this patch:
  58963   18536    1928   79427   13643 ./spl/u-boot-spl

With this patch:
  56542   18536    1956   77034   12cea ./spl/u-boot-spl

Note:
To make it possible to compile tiny-printf.c instead of vsprintf.c when
CONFIG_USE_TINY_PRINTF is defined, the functions printf() and vprintf() are
moved from common/console.c into vsprintf.c in this patch.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>

Change some comments to match the U-Boot coding style rules.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: NSimon Glass <sjg@chromium.org>

As done in commit da229e4e [sandbox: Drop special-case sandbox console code],
this patch drops the sandbox special-case code in vprintf() that was
missed by Simon at that time.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: NSimon Glass <sjg@chromium.org>

compiling U-Boot for avr32 boards shows since
commit 3d1957f0 "dm: i2c: Add support for multiplexed I2C buses"
this warning:

Building current source for 4 boards (4 threads, 8 jobs per thread)
     avr32:  +   atstk1002
+(atstk1002) drivers/i2c/built-in.o: warning: input is not relaxable
     avr32:  +   grasshopper
+(grasshopper) drivers/i2c/built-in.o: warning: input is not relaxable
     avr32:  +   atngw100
+(atngw100) drivers/i2c/built-in.o: warning: input is not relaxable
     avr32:  +   atngw100mkii
+(atngw100mkii) drivers/i2c/built-in.o: warning: input is not relaxable
    0    4    0 /4      0:00:16  : atngw100mkii

Fix it.
Signed-off-by: NHeiko Schocher <hs@denx.de>
Reviewed-by: NRoger Meier <r.meier@siemens.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>

After introduction of CONFIG_SYS_NS16550 these defconfig files were
added and need to be updated.
Signed-off-by: NTom Rini <trini@konsulko.com>

The lamobo-r1 board, sometimes called the BPI-R1 but not labelled as such
on the PCB, is meant as a A20 based router board. As such the board comes
with a built-in switch chip giving it 5 gigabit ethernet ports, and it
has a large empty area on the pcb with mounting holes which will fit a
2.5 inch harddisk. To complete its networking features it has a
Realtek RTL8192CU for WiFi 802.11 b/g/n.

The dts file is identical to the one submitted upstream.
Signed-off-by: NJelle de Jong <jelledejong@powercraft.nl>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

Add defconfig files for the Orangepi Plus and Orangepi PC.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

These files are based on the current latest upstream kernel work. The
bus_gates bindings may still change, but for u-boot that does not matter
as we do not (yet) use any clock info from devicetree for sunxi u-boot.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

The 3.4 kernel from the Allwinner SDK is clocking AHB1 at 200MHz
on Allwinner H3 and using PLL6 as the clock source (PLL6/3).
This can be verified by reading the value of the AHB1_APB1_CFG_REG
register via /dev/mem. It always reads as 0x3180 regardless of
the current cpufreq operating point. So this configuration should
be safe for use in U-Boot too.

PLL6 also needs to be configured before it is used as the clock
source, according to the "CCU / Programming Guidelines" section
of the Allwinner manual.

The current low AHB1 clock speed is limiting the USB transfer
speed when booting via FEL. This patch can increase the FEL USB
transfer speed from ~510 KB/s to ~950 KB/s.
Signed-off-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

Based on existing A23/A33 code and the original H3 boot0.
Signed-off-by: NJens Kuske <jenskuske@gmail.com>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

Add initial sun8i H3 support, only uart + mmc are supported for now.
Signed-off-by: NJens Kuske <jenskuske@gmail.com>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

This is necessary to distinguish between the "dfu-util --detach" and
the "dfu-util --reset" requests.

The default weak implementation of dfu_usb_get_reset() unconditionally
reboots the device, but we want to be able to continue the boot.scr
execution after writing the kernel, fdt and ramdisk to RAM via DFU.
Signed-off-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

The DFU protocol implementation in U-Boot is much faster than the
FEL protocol implementation in the boot ROM on Allwinner devices.
Using DFU instead of FEL improves the USB transfer speed from
500-900 KB/s to 3.2-3.7 MB/s. This is particularly useful for
reducing the time needed for booting systems with large initrd
images.

FEL is still useful for loading the U-Boot bootloader and a boot
script, which may then activate DFU in the following way:

   setenv dfu_alt_info ${dfu_alt_info_ram}
   dfu 0 ram 0
   bootm ${kernel_addr_r} ${ramdisk_addr_r} ${fdt_addr_r}

The rest of the files can be transferred to the device using the
"dfu-util" tool.
Signed-off-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

Add support for storing the environment in CFI NOR flash on Juno and FVP
models.

I also removed some config values that are not used by CFI flash parts.

Juno has 1 flash part with 259 sectors.  The first 255 sectors are
0x40000 (256kb) and are followed by 4 sectors of 0x10000 (64KB).

FVP models simulate a 64MB NOR flash part at base address 0x0FFC0000.
This part has 256 x 256kb sectors.  We use the last sector to store the
environment.

To save the NOR flash to a file, the following parameters should be
passed to the model:

    -C bp.flashloader1.fname=${FILENAME}
    -C bp.flashloader1.fnameWrite=${FILENAME}

Foundation models don't simulate the NOR flash, but having NOR support
in the u-boot binary does not harm:  attempting to write to the NOR will
fail gracefully.
Signed-off-by: NRyan Harkin <ryan.harkin@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

This patch allows vexpress64 targets to be compiled when
CONFIG_SYS_FLASH_CFI is enabled.

I considered using #warning instead of #error, but this just clutters up
the build output and hides real warnings.

Without this patch, you see errors during compilation like this:

include/configs/vexpress_aemv8a.h:42:2: error: #error "Unknown board
variant"
 #error "Unknown board variant"
include/configs/vexpress_aemv8a.h:115:2: error: #error "Unknown board
variant"
 #error "Unknown board variant"
include/configs/vexpress_aemv8a.h:280:2: error: #error "Unknown board
variant"
 #error "Unknown board variant"
make[1]: *** [tools/envcrc.o] Error 1
make: *** [tools] Error 2
In file included from include/config.h:5:0,
                 from tools/envcrc.c:19:
Signed-off-by: NRyan Harkin <ryan.harkin@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

This patch makes the 2nd DRAM bank available on Juno only and not on
other vexpress64 targets, eg. the FVP models.

The commit below added a 2nd bank of NOR flash for Juno, but also for
all vexpress64 targets:

    commit 2d0cee1c
    Author: Liviu Dudau <Liviu.Dudau@foss.arm.com>
    Date:   Mon Oct 19 11:08:31 2015 +0100

    vexpress64: Juno: Declare all 8GB of RAM and make them visible to the kernel.

    Juno comes with 8GB RAM, but U-Boot only passes 2GB to the kernel.
    Declare a secondary memory bank and set the sizes correctly.
Signed-off-by: NLiviu Dudau <Liviu.Dudau@foss.arm.com>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
Reviewed-by: NRyan Harkin <ryan.harkin@linaro.org>
Tested-by: NRyan Harkin <ryan.harkin@linaro.org>

Unfortunately, I only fully tested on Juno R0, R1 and the FVP Foundation
model.  Whilst FVP Base AEMV8 models run U-Boot OK, they fail to boot
the kernel.
Signed-off-by: NRyan Harkin <ryan.harkin@linaro.org>
Acked-by: NLiviu Dudau <liviu.dudau@foss.arm.com>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>

Only compile in PCIe support if the board really uses it. Provide
a __weak stub for the init function if e.g. FVP is being built.
Signed-off-by: NRyan Harkin <ryan.harkin@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

On a Juno r1 the PCI controller init routine outputs the rather boring
ATR entry information.
Do this only with DEBUG defined to avoid cluttering the user's
terminal.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Acked-by: NRyan Harkin <ryan.harkin@linaro.org>

Cosmetic fixes to the file, make it checkpatch clean.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Add additional parameter into the eeprom command to select
the I2C bus on which the eeprom resides.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Add bus argument to eeprom_init(), so that it can select
the I2C bus number on which the eeprom resides. Any negative
value of the $bus argument will preserve the old behavior.
This is in place so that old code does not randomly break.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>
[trini: Wrap i2c_set_bus_num() call with CONFIG_SYS_I2C test]
Signed-off-by: NTom Rini <trini@konsulko.com>

Unify the code for doing read/write into single function, since the
code for both the read and write is almost identical. This again
trims down the code duplication.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Pull out the code which computes the length of the transfer
into separate code and clean it up a little. This again trims
down the code duplication.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Implement default value of 8 for this macro and pull out all of
this macro out of the code. The default value of 8 actually does
implement exactly the same behavior as the previous code which
was in the #else clause of the ifdef.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Just suck the ugly ifdef around eeprom_init() call into eeprom_init()
function itself. This puts all of the ifdef mess into one place.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Pull this macro to the beginning of the cmd_eeprom.c and remove
another nasty ifdef from the code. Note that this is legal, since
udelay(0) changes the behavior only such that it pings the WDT if
WDT is enabled and otherwise does not wait.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Make this function weak and implement it's weak implementation
so that the boards can just reimplement it. This zaps the horrid
CONFIG_SYS_EEPROM_WREN macro.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Pull out the code computing the EEPROM address into separate function
so that it's not duplicated.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Pull out the code which does the I2C or SPI read/write, so that
the beefy ifdef around it is contained in a single function.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

This macro is no longer used, so just reap it.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Remove this function as it's no longer used.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Now that the only user of CONFIG_SYS_EEPROM_X40430 was removed,
remove this unused code from cmd_eeprom.c
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

This option only complicates the code unnecessarily, just use
CONFIG_SYS_DEF_EEPROM_ADDR as the default address if there are
only five arguments to eeprom {read/write} if this is defined.
If CONFIG_SYS_DEF_EEPROM_ADDR is not defined, we mandate all
six arguments.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Just move the code around so that the forward declarations are not
necessary. Also zap a few checkpatch issues where applicable and
zap the use of #ifdef CONFIG_CMD_EEPROM in the code, since this is
always true.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

This rewrite uses lately promoted eeprom_init(int) function to choose the
right I2C bus when writing data to the EEPROM.
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

The NOR flash on Keystone 2 evms has a u-boot-spl partition size of
0x80000.

Currently burn_uboot_spi will erase 0x100000 from the spi NOR which will
cause a partial erase of the misc partition.

Fix this by correcting the erase size.
Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com>

The WAKEUP_X pins are always an input no matter the pinmux mode.
However, the 18th bit that typical configures a pin as an input is
considered reserved for the WAKEUP_X pins. Therefore, for any WAKEUP
pin remove any configuration that sets that pin as an input. Since
those pins are only inputs remove any output configuration from those
pins.
Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com>

Change to ns16550 uart for 10m50 devboard based on a new
Altera release.
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>
Reviewed-by: NTom Rini <trini@konsulko.com>
Acked-by: NSimon Glass <sjg@chromium.org>

Move CONFIG_SYS_NS16550 to Kconfig, and run moveconfig.py.
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>