- 05 8月, 2016 25 次提交
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由 Tom Rini 提交于
In the case of omap3 we have a number of platforms that are close to exceeding SRAM limits, depending on compiler. Move to USE_TINY_PRINTF to give them more room. OMAP4 will soon enough be in a similar place, so enable that now. Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Tom Rini 提交于
In reality all omap3 platforms support SPL so move the select for this up a level. Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Max Filippov 提交于
print_std_bdinfo outputs typical set of board information entries: boot params location, memory and flash addresses and sizes, network interfaces information and configured serial baud rate. Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Max Filippov 提交于
print_baudrate outputs serial baud rate. Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Max Filippov 提交于
print_eth_ip_addr outputs eth configurations for up to 6 interfaces and configured IP address. Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Max Filippov 提交于
print_bi_flash outputs flashstart, flashsize and flashoffset lines. Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Max Filippov 提交于
print_bi_dram outputs start address and size for each DRAM bank. Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Max Filippov 提交于
print_bi_mem outputs memstart and memsize lines. Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Max Filippov 提交于
print_bi_boot_params outputs boot parameters structure location. Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Masahiro Yamada 提交于
We need to ensure that CONFIG_PHYS_64BIT is configured via Kconfig so that it is always available to the build system. Otherwise we can run into cases where we have inconsistent sizes of certain attributes. Ravi Babu reported offset mismatch of struct dwc3 across files since commit 95ebc253 ("types.h: move and redefine resource_size_t"). Since the commit, resource_addr_t points to phys_addr_t, whose size is dependent on CONFIG_PHYS_64BIT for ARM architecture. I tried my best to use "select" where possible (for example, ARMv8 architecture) because I think this kind of option is generally user- unconfigurable. However, I see some of PowerPC boards have 36BIT defconfigs as well as 32BIT ones. I moved CONFIG_PHYS_64BIT to the defconfigs for such boards. CONFIG_36BIT is no longer referenced, so all of the defines were removed from CONFIG_SYS_EXTRA_OPTIONS. Fixes: 95ebc253 ("types.h: move and redefine resource_size_t") Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Reported-by: NRavi Babu <ravibabu@ti.com> Acked-by: NStefan Roese <sr@denx.de> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Masahiro Yamada 提交于
We mostly move config options from board header files to Kconfig, but sometimes config defines come from CONFIG_SYS_EXTRA_OPTIONS. Historically, CONFIG_SYS_EXTRA_OPTIONS originates in boards.cfg, which was used as a central database of configuration prior to the Kconfig conversion. Now, we want to migrate to primary entries in Kconfig rather than option list in CONFIG_SYS_EXTRA_OPTIONS, so it should be helpful to have the tool to cleanup CONFIG_SYS_EXTRA_OPTIONS automatically. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Masahiro Yamada 提交于
I want to reuse this routine in the next commit. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Masahiro Yamada 提交于
Correct the clean-up of such defines that continue across multiple lines, like follows: #define CONFIG_FOO "this continues to the next line " \ "this line should be removed too" \ "this line should be removed as well" Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Masahiro Yamada 提交于
Show code diff in color if --color option is given. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Masahiro Yamada 提交于
The header cleanup feature of this tool now removes empty ifdef's, successive blank lines as well as moved option defines. So, we want to see a little more context to check which lines were deleted. It is true that we can see it by "git diff", but it would not work in the --dry-run mode. So, here, this commit. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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由 Masahiro Yamada 提交于
The tools/moveconfig.py has a feature to cleanup #define/#undef's of moved config options, but I want this tool to do a better job. For example, when we are moving CONFIG_FOO and its define is surrounded by #ifdef ... #endif, like follows: #ifdef CONFIG_BAR # define CONFIG_FOO #endif The header cleanup will leave empty #ifdef ... #endif: #ifdef CONFIG_BAR #endif Likewise, if a define line between two blank lines <blank line> #define CONFIG_FOO <blank lines. ... is deleted, the result of the clean-up will be successive empty lines, which is a coding-style violation. It is tedious to remove left-over garbage lines manually, so I want the tool to take care of this. The tool's job is still not perfect, so we should check the output of the tool, but I hope our life will be much easier with this patch. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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由 Masahiro Yamada 提交于
The clean tree (make mrproper) and compilers are required when moving config options, but not needed when we only cleanup headers. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Masahiro Yamada 提交于
The files in include/generated are generated during build and removed by "make mrproper", so it has no point to touch them by this tool. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Tom Rini 提交于
With e2fsprogs after 1.43 the 64bit and metadata_csum features are enabled by default. The metadata_csum feature changes how ext4_group_desc->bg_checksum is calculated, which would break write support. The 64bit feature however introduces changes such that it cannot be read by implementations that do not support it. Since we do not support this, we must not mount it. Cc: Stephen Warren <swarren@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Stefan Roese <sr@denx.de> Reported-by: NAndrew Bradford <andrew.bradford@kodakalaris.com> Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Tom Rini 提交于
As part of testing booting Linux kernels on Rockchip devices, it was discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for some cases incomplete isb definitions. This was causing a failure to boot of the Linux kernel. In order to solve this problem as well as cover any corner cases that we may also have had a number of changes are made in order to consolidate things. First, <asm/barriers.h> now becomes the source of isb/dsb/dmb definitions. This however introduces another complexity. Due to needing to build SPL for 32bit tegra with -march=armv4 we need to borrow the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete form. Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add a comment about it. Now that we can always know what the target CPU is capable off we can get always do the correct thing for the barrier. The final part of this is that need to be consistent everywhere and call isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the function names in others. Reviewed-by: NStephen Warren <swarren@nvidia.com> Tested-by: NStephen Warren <swarren@nvidia.com> Acked-by: NZiyuan Xu <xzy.xu@rock-chips.com> Acked-by: NSandy Patterson <apatterson@sightlogix.com> Reported-by: NZiyuan Xu <xzy.xu@rock-chips.com> Reported-by: NSandy Patterson <apatterson@sightlogix.com> Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Alexey Brodkin 提交于
As of now we have 2 flavors of ARC SDP boards: 1) AXS101 - with ARC770 in ASIC 2) AXS103 - with ARC HS38 in FPGA Both options share exactly the same base-board and only differ with CPU-tiles in use. That means all peripherals are the same (they are implemented in FPGA on the base-board) and so generic board could be used for both. While at it: * Recreated defconfigs with savedefconfig * In include/configs/axs10x.h numerical sizes replaced with defines from linux/sizes.h for better readability. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Alexey Brodkin 提交于
ARCangel was one of the main development boards back in the day but now it's gone and replaced by other boards like ARC SDP. But we also used to have simulation platform very similar to ARCangel4 in terms of CPU settings as well as basic IO like UART. Even though ARCangel4 is long gone now we have a replacement for simulation which is a plain or stand-alone nSIM and Free nSIM. Note Free nSIM is available for download here: https://www.synopsys.com/cgi-bin/dwarcnsim/req1.cgi And while at it: * Finally switch hex numerical values in nsim.h to defines from include/linux/sizes.h * Add defconfigs with ARC HS38 cores * Recreated all defconfigs with savedefconfig Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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由 Alexey Brodkin 提交于
Starting from arc-2016.03 GNU tools linker properly works with symbols defined in linker script and so external declarations are no longer required, dump them. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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由 Alexey Brodkin 提交于
Initially IVT for ARCv2 was simply copypasted from ARCompact with some selected fixes so basic stuff works. Now we update it with more ARCv2 specific vectors like * Software Interrupt * Division by zero * Data cache consistency error * Misaligned access Also normal interrupts are now implemented properly and extened to all possible 240 items. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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由 Alexey Brodkin 提交于
This might be useful to make sure relocation fixups really happen. And since this info gets printed only in DEBUG build it doesn't really hurt normal execution. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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- 04 8月, 2016 1 次提交
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由 Scott Wood 提交于
This is what Linux maps on classic PPC during boot, and modern kernel images don't fit within the current 8 MiB uncompressed limit. Adjust image load addresses to be above this limit to avoid conflicts. Signed-off-by: NScott Wood <oss@buserror.net> Reviewed-by: NYork Sun <york.sun@nxp.com>
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- 03 8月, 2016 14 次提交
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由 Hou Zhiqiang 提交于
The PPA binary may be stored on QSPI flash instead of NOR. So, deprecated CONFIG_SYS_LS_PPA_FW_IN_NOR in favour of CONFIG_SYS_LS_PPA_FW_IN_XIP to prevent fragmentation of code by addition of a new QSPI specific flag. Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: NAbhimanyu Saini <abhimanyu.saini@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Hou Zhiqiang 提交于
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Hou Zhiqiang 提交于
Appended the compatible strings of old version PSCI to the latest version supported. And there are some psci functions' property must be added to DT only for psci version 0.1, including cpu_on, cpu_off, cpu_suspend, migrate. Note, ARMv8 Secure Firmware Framework doesn't support PSCI ver 0.1. Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Hou Zhiqiang 提交于
Identify the PSCI node only by its name, so removed the code finding it by compatible string. Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 York Sun 提交于
Commit 5605dc61 tried to fix wr_lat bit in timing_cfg_2, but the change was wrong. wr_lat has 5 bits with MSB at [13] and lower 4 bits at [9:12], in big-endian convention. Signed-off-by: NYork Sun <york.sun@nxp.com> Reported-by: NThomas Schaefer <Thomas.Schaefer@kontron.com>
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由 York Sun 提交于
Update maintainers for secure boot targets. Signed-off-by: NYork Sun <york.sun@nxp.com>
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由 Wenbin Song 提交于
Enable pxe command for ls1043ardb and ls1043aqds. Signed-off-by: NWenbin Song <wenbin.song@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Prabhakar Kushwaha 提交于
Refresh cycle value must be selected based on the frequency of DDR. tREFI = 7.8 us as per JEDEC. The value for MDREF[REF_CNT] should be based on round up (tREFI/tCK) formula. For 500MHz, mdref value should be 0x0f3c8000. Signed-off-by: NCalvin Johnson <calvin.johnson@nxp.com> Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Prabhakar Kushwaha 提交于
Enable DDR row-bank-column decoding to decode DDR address as row-bank-column instead of bank-row-column for improving performance of serial data transfers. Signed-off-by: NCalvin Johnson <calvin.johnson@nxp.com> Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Prabhakar Kushwaha 提交于
qixis_reset altbank usagge ~QIXIS_LBMAP_MASK in code. So define inverse value QIXIS_LBMAP_MASK. Also, update QIXIS_RST_CTL_RESET value to keep RST_CTL[REQ_MOD] as 0b11 i.e. PORESET during qixis_reset Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Sumit Garg 提交于
Update blob cmd to accept 64bit source, key modifier and destination addresses. Also correct output result print format for fsl specific implementation of blob cmd. Signed-off-by: NSumit Garg <sumit.garg@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Yunhui Cui 提交于
Warnins log: drivers/spi/fsl_qspi.c: In function ‘qspi_ahb_read’: drivers/spi/fsl_qspi.c:400:16: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] memcpy(rxbuf, (u8 *)(priv->cur_amba_base + priv->sf_addr), len); Signed-off-by: NYunhui Cui <yunhui.cui@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 York Sun 提交于
Update erratum workaround for A006379 to set register CPCHDBCR0 with value 0x001e0000, replacing the old value 0x003c0000. Signed-off-by: NYork Sun <york.sun@nxp.com> Reported-by: NDave Liu <dave.liu@nxp.com>
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