Signed-off-by: NBartlomiej Sieka <tur@semihalf.com>

The patch is following the commit 39243840

mpc86xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache

This is needed in unlock_ram_in_cache() because it is called from C and
will corrupt the small data area anchor that is kept in R2.

lock_ram_in_cache() is modified similarly as good coding practice, but
is not called from C.
Signed-off-by: NNick Spence <nick.spence@freescale.com>

also, the r2 is used as global data pointer.
Signed-off-by: NDave Liu <daveliu@freescale.com>

The current calculation will fail to cover all memory if
its size is not a power of two.
Signed-off-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

Signed-off-by: NDave Liu <daveliu@freescale.com>

The commit 67256678 add
the another global data pointer save, but in fact the
global data pointer will be initialized in the board_init_r,
so remove it such as the 85xx/83xx family.
Signed-off-by: NDave Liu <daveliu@freescale.com>
Acked-by: NKumar Gala <kumar.gala@freescale.com>

I believe these code was copied from 74xx family, but for
86xx, it is unused.
Signed-off-by: NDave Liu <daveliu@freescale.com>
Acked-by: NKumar Gala <kumar.gala@freescale.com>

The DDR1 LAW will precedence the DDR2 LAW, so remove
the second DDR LAW.
Signed-off-by: NDave Liu <daveliu@freescale.com>
Acked-by: NBecky Bruce <becky.bruce@freescale.com>

The DDR controller of 86xx processors have the ECC data init
feature, and the new DDR code is using the feature, we don't
need the way with DMA to init memory again.
Signed-off-by: NDave Liu <daveliu@freescale.com>
Acked-by: NKumar Gala <kumar.gala@freescale.com>

We must invalidate TLBs before MMU turn on, but
currently the code is not, if there are some stale
TLB entry valid in the TLBs, it will cause strange
issue.
Signed-off-by: NDave Liu <daveliu@freescale.com>
Acked-by: NBecky Bruce <becky.bruce@freescale.com>

Previously, the documentation claimed that NAND boot is not supported.
This is no longer true.
Signed-off-by: NScott Wood <scottwood@freescale.com>

As reported by Ilko Iliev <iliev@ronetix.at>, the "nand erase clean"
command is currently broken, and among other things causes all blocks
to be marked bad.

This implements it properly using MTD_OOB_AUTO, along with some
indentation fixes.
Signed-off-by: NScott Wood <scottwood@freescale.com>

Hardware expects ECCM 0 for small page and ECCM 1 for large page
when booting from NAND, so use those defaults.
Signed-off-by: NScott Wood <scottwood@freescale.com>

This patch defines 1M TLB&LAW size for NAND on MPC8572DS, assigns
0xffa00000 for CONFIG_SYS_NAND_BASE and adds other NAND supports in
config file.

It also moves environment(CONFIG_ENV_ADDR) outside of u-boot image, to
make room for the increased code size with NAND enabled.
Signed-off-by: NJason Jin <Jason.Jin@freescale.com>
Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: NScott Wood <scottwood@freescale.com>

- Rename lbus83xx_t to fsl_lbus_t and move it to asm/fsl_lbc.h so that it
  can be shared by both 83xx and 85xx
- Remove lbus83xx_t and replace it with fsl_lbus_t in all 83xx boards
  files which use lbus83xx_t.
- Move FMR, FIR, FCR, FPAR, LTESR from mpc83xx.h to asm/fsl_lbc.h so that
  85xx can share them.
Signed-off-by: NJason Jin <Jason.Jin@freescale.com>
Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: NScott Wood <scottwood@freescale.com>

I accidentally broke this in when making consistent the partial
alignment of the longhelp.
Signed-off-by: NScott Wood <scottwood@freescale.com>

Some chips require a RESET after power-up (e.g. Micron MT29FxGxxxxx).
The first command sent is NAND_CMD_READID.
Issue a NAND_CMD_RESET in nand_scan_ident before reading the device id.
Tested with an MT29F4G08AAC.
Signed-off-by: NKarl Beldan <karl.beldan@gmail.com>
Signed-off-by: NScott Wood <scottwood@freescale.com>

This brings the core NAND code up to date with the Linux kernel.

Since there were several drivers in Linux as of the last update that are
not in u-boot, I'm not bringing over new drivers that have been added
since in the absence of an interested party.

I did not update OneNAND since it was recently synced by Kyungmin Park,
and I'm not sure exactly what the common ancestor is.
Signed-off-by: NScott Wood <scottwood@freescale.com>

Added the ability to config out bootm support for Linux, NetBSD, RTEMS
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Add support for 'bdt', 'cmdline', 'prep' to the linux PPC bootm.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Add the ability to break the steps of the bootm command into several
subcommands: start, loados, ramdisk, fdt, bdt, cmdline, prep, go.

This allows us to do things like manipulate device trees before
they are passed to a booting kernel or setup memory for a secondary
core in multicore situations.

Not all OS types support all subcommands (currently only start, loados,
ramdisk, fdt, and go are supported).
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

This removes a bit of code and makes it easier for the upcoming sub bootm
command support to call into the proper OS specific handler.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Signed-off-by: NWolfgang Denk <wd@denx.de>

Renamed show_boot_progress in assembler init phase to
show_boot_progress_asm to avoid link conflicts with C version
Signed-off-by: NGraeme Russ <graeme.russ@gmail.com>

The MPC8572 has a 4-bit wide PORDEVSR IO_SEL field. Other MPC85xx
processors have a 3-bit wide IO_SEL field but have the most
significant bit is wired to 0 so this change should not affect
them.
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>

The existing code has a few errors that need to be fixed in
order to support large RAM sizes.  Fix those, and add a
comment to make it clearer.
Signed-off-by: NBecky Bruce <becky.bruce@freescale.com>
Acked-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The information displayed when CONFIG_LCD_INFO is set is inherently
board-specific, so it should be done by the board code. The current code
dealing with this only handles two cases, and is already a horrible mess
of #ifdeffery.

Yes, this duplicates some code, but it also allows boards to print more
board-specific information; this used to be very difficult.
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: NAnatolij Gustschin <agust@denx.de>

This allows the logo/info rendering routines to use the regular
lcd_putc/lcd_puts/lcd_printf calls.
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: NAnatolij Gustschin <agust@denx.de>

lcd_printf() has a prototype in include/lcd.h but no implementation. Fix
this by borrowing the lcd_printf() implementation from the cogent board
code (which appears to use its own LCD framework.)
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: NAnatolij Gustschin <agust@denx.de>

If the board _didn't_ request INVLINE_INVERTED, we set INVLINE_INVERTED,
otherwise we don't. WTF?
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: NAnatolij Gustschin <agust@denx.de>

atmel_lcdfb doesn't actually need anything from asm/arch/hardware.h. It
includes a file that does, asm/arch/gpio.h, but this file doesn't
include <asm/arch/hardware.h> like it's supposed to.

Add the missing include to asm/arch/gpio.h and remove the workaround
from the atmel_lcdfb driver. This makes the driver compile on avr32.
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: NAnatolij Gustschin <agust@denx.de>

Converted MPC8610HCPD, MPC8641HPCN, and SBC8641D to use
fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup().

With these changes the board code is a bit smaller and we get dma-ranges
set in the device tree for these boards.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Signed-off-by: NAndrew Fleming-AFLEMING <afleming@freescale.com>
Acked-by: NJon Loeliger <jdl@freescale.com>

Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS,
MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows()
and ft_fsl_pci_setup().

With these changes the board code is a bit smaller and we get dma-ranges
set in the device tree for these boards.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Signed-off-by: NAndrew Fleming-AFLEMING <afleming@freescale.com>

Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Signed-off-by: NAndrew Fleming-AFLEMING <afleming@freescale.com>

Add a common setup function that determines the pci_region(s) based
on how much memory we have in the system.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Signed-off-by: NAndrew Fleming-AFLEMING <afleming@freescale.com>

* PCI Inbound window was setup incorrectly.  The PCI address and system
  address were swapped.  The PCI address should be setting piwar/piwbear
  and the system address should be setting pitar.

* Removed masking of addresses to allow for system address to support
  system address & PCI address >32-bits

* Set PIWBEAR & POTEAR to allow for full 64-bit PCI addresses

* Respect the PCI_REGION_PREFETCH for inbound windows
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Signed-off-by: NAndrew Fleming-AFLEMING <afleming@freescale.com>