- 18 11月, 2013 4 次提交
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由 Masahiro Yamada 提交于
- Descend into drivers/fpga/ only when CONFIG_FPGA=y - Descend into drivers/bios_emulator only when CONFIG_BIOSEMU=y Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
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由 Masahiro Yamada 提交于
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
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由 Masahiro Yamada 提交于
The support for COBJS, COBJS-y, SOBJS, SOBJS-y, GLCOBJS, GLSOBJS from scripts/Makefile.build. Going forward we need to use Kbuild style consistently. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
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由 Masahiro Yamada 提交于
Board config.mk do not need to add -DCONFIG_SYS_TEXT_BASE to CPPFLAGS because the top level config.mk does instead. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
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- 16 11月, 2013 6 次提交
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由 Masahiro Yamada 提交于
Commit 309a292e deleted OXC board, but missed to remove the standalone example specific to OXC board. eepro100_eeprom.c has been an orphan file for a long term. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
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由 Masahiro Yamada 提交于
Commit 7e8c53d7 removed eNET board but missed to add eNET to README.scrapyard. This commit adds it for the record. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com> Cc: Simon Glass <sjg@chromium.org> Cc: Graeme Russ <graeme.russ@gmail.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Masahiro Yamada 提交于
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com> Cc: Thomas Chou <thomas@wytron.com.tw>
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由 Masahiro Yamada 提交于
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
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由 Masahiro Yamada 提交于
Since commit c2dd0d45 and 45bf0585 introduced the new cache maintainance framework to ARM, CONFIG_L2_OFF has not been used at all. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
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由 Tom Rini 提交于
In 6789e84e we update u-boot-spl.lds for OMAP to ensure we include adapter information, as we use i2c during SPL. However, the regex used also means we included commands that may have been built. On omap5_uevm this leads to a failure as we include the command from the do_tca642x command, and fail to link. The fix is to restrict our regex to only the i2c list parts. Signed-off-by: NTom Rini <trini@ti.com>
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- 15 11月, 2013 1 次提交
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- 14 11月, 2013 9 次提交
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由 Laurentiu TUDOR 提交于
When indexing freqProcessor[] we use the first value in the cpu's "reg" property, which on new e6500 cores IDs the threads. But freqProcessor[] should be indexed with a core index so, when fixing "the clock-frequency" cpu node property, access the freqProcessor[] with the core index derived from the "reg' property. If we don't do this, last half of the "cpu" nodes will have broken "clock-frequency" values. Signed-off-by: NLaurentiu Tudor <Laurentiu.Tudor@freescale.com> Cc: York Sun <yorksun@freescale.com>
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由 Laurentiu TUDOR 提交于
Update the code that builds the pci endpoint liodn offset list so that it doesn't overlap with other liodns and doesn't generate negative offsets like: fsl,liodn-offset-list = <0 0xffffffcd 0xffffffcf 0xffffffd1 0xffffffd3 0xffffffd5 0xffffffd7 0xffffffd9 0xffffffdb>; The update consists in adding a parameter to the function that builds the list to specify the base liodn. On PCI v2.4 use the old base = 256 and, on PCI 3.0 where some of the PCIE liodns are larger than 256, use a base = 1024. The version check is based on the PCI controller's version register. Signed-off-by: NLaurentiu Tudor <Laurentiu.Tudor@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: York Sun <yorksun@freescale.com>
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由 Laurentiu TUDOR 提交于
The liodn for the T4240's PCIE controller is no longer set through a register in the guts register block but with one in the PCIE register block itself. Use the already existing SET_PCI_LIODN_BASE macro that puts the liodn in the correct register. Signed-off-by: NLaurentiu Tudor <Laurentiu.Tudor@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: York Sun <yorksun@freescale.com>
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由 ramneek mehresh 提交于
Define base addresse for both MPH(USB1) and DR(USB2) controllers for MPC834x socs Signed-off-by: NRamneek Mehresh <ramneek.mehresh@freescale.com>
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由 Priyanka Jain 提交于
T1042RDB_PI is Freescale Reference Design Board supporting the T1042 QorIQ Power Architecture™ processor. T1042 is a reduced personality of T1040 SoC without Integrated 8-port Gigabit. The board is designed with low power features targeted for Printing Image Market. T1042RDB_PI is similar to T1040RDB board with few differences like it has video interface, supports T1042 personality T1042RDB_PI board Overview ----------------------- - Four e5500 cores, each with a private 256 KB L2 cache - 256 KB shared L3 CoreNet platform cache (CPC) - Interconnect CoreNet platform - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support - Data Path Acceleration Architecture (DPAA) incorporating acceleration for the following functions: - Packet parsing, classification, and distribution - Queue management for scheduling, packet sequencing, and congestion management - Cryptography Acceleration - RegEx Pattern Matching Acceleration - IEEE Std 1588 support - Hardware buffer management for buffer allocation and deallocation - Ethernet interfaces - Two on-board RGMII 10/100/1G ethernet ports. - SERDES Connections, 8 lanes supporting: — PCI — SATA 2.0 - DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and Interleaving -IFC/Local Bus - NAND flash: 1GB 8-bit NAND flash - NOR: 128MB 16-bit NOR Flash - Ethernet - Two on-board RGMII 10/100/1G ethernet ports. - PHY #0 remains powered up during deep-sleep - CPLD - Clocks - System and DDR clock (SYSCLK, “DDRCLK”) - SERDES clocks - Video - DIU supports video at up to 1280x1024x32bpp - HDMI connector - Power Supplies - USB - Supports two USB 2.0 ports with integrated PHYs - Two type A ports with 5V@1.5A per port. - SDHC - SDHC/SDXC connector - SPI - On-board 64MB SPI flash - I2C - Device connected: EEPROM, thermal monitor, VID controller, RTC - Other IO - Two Serial ports - ProfiBus port - Four I2C ports Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: NPriyanka Jain <Priyanka.Jain@freescale.com>
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由 Priyanka Jain 提交于
T1040RDB is Freescale Reference Design Board supporting the T1040 QorIQ Power Architecture™ processor. T1040RDB board Overview ----------------------- - Four e5500 cores, each with a private 256 KB L2 cache - 256 KB shared L3 CoreNet platform cache (CPC) - Interconnect CoreNet platform - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support - Data Path Acceleration Architecture (DPAA) incorporating acceleration for the following functions: - Packet parsing, classification, and distribution - Queue management for scheduling, packet sequencing, and congestion management - Cryptography Acceleration - RegEx Pattern Matching Acceleration - IEEE Std 1588 support - Hardware buffer management for buffer allocation and deallocation - Ethernet interfaces - Integrated 8-port Gigabit Ethernet switch - Four 1 Gbps Ethernet controllers - SERDES Connections, 8 lanes supporting: - PCI - SGMII - QSGMII - SATA 2.0 - DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and Interleaving -IFC/Local Bus - NAND flash: 1GB 8-bit NAND flash - NOR: 128MB 16-bit NOR Flash - Ethernet - Two on-board RGMII 10/100/1G ethernet ports. - PHY #0 remains powered up during deep-sleep - CPLD - Clocks - System and DDR clock (SYSCLK, “DDRCLK”) - SERDES clocks - Power Supplies - USB - Supports two USB 2.0 ports with integrated PHYs - Two type A ports with 5V@1.5A per port. - SDHC - SDHC/SDXC connector - SPI - On-board 64MB SPI flash - I2C - Devices connected: EEPROM, thermal monitor, VID controller - Other IO - Two Serial ports - ProfiBus port Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: NPriyanka Jain <Priyanka.Jain@freescale.com> [York Sun: fixed Makefile] Acked-by: NYork Sun <yorksun@freescale.com>
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由 Priyanka Jain 提交于
T1040 Soc has four personalities: -T1040 (4 cores with L2 switch) -T1042:Reduced personality of T1040 without L2 switch -T1020:Reduced personality of T1040 with less cores(2 cores) -T1022:Reduced personality of T1040 with 2 cores and without L2 switch Update defines in arch/powerpc header files, Makefiles and in driver/net/fm/Makefile to support all T1040 personalities Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: NPriyanka Jain <Priyanka.Jain@freescale.com> [York Sun: fixed Makefiles] Acked-by: NYork Sun <yorksun@freescale.com>
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由 Shengzhou Liu 提交于
- Remove duplicate doc/README.p1010rdb - Rename README to README.P1010RDB-PA - Add new README.P1010RDB-PB P1010RDB-PB is a variation of previous P1010RDB-PA board. Signed-off-by: NShengzhou Liu <Shengzhou.Liu@freescale.com>
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由 Prabhakar Kushwaha 提交于
Use a default RCW of protocol 0x66. A PBI configure file which uses CPC as 256KB SRAM. It can be used by PBL tool on T1040 to build a pbl boot image. Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
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- 13 11月, 2013 8 次提交
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由 Alexey Brodkin 提交于
This delay applies to any data transfer on I2C bus. For example 1kB data read with per-byte access (which happens if environment is stored in I2C EEPROM) takes more than 10 seconds. Moreover data bus driver has to care about bus state and data transfer, but not about internal states of attached devices. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Cc: Tom Rini <trini@ti.com> cc: Armando Visconti <armando.visconti@st.com> Cc: Stefan Roese <sr@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Heiko Schocher <hs@denx.de> Cc: Vipin KUMAR <vipin.kumar@st.com> Cc: Tom Rix <Tom.Rix@windriver.com> Cc: Mischa Jonker <mjonker@synopsys.com>
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由 Alexey Brodkin 提交于
As it is stated in DesignWare I2C databook: writes to IC_TAR (0x4) register succeed only when IC_ENABLE[0] is set to 0. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Cc: Tom Rini <trini@ti.com> cc: Armando Visconti <armando.visconti@st.com> Cc: Stefan Roese <sr@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Heiko Schocher <hs@denx.de> Cc: Vipin KUMAR <vipin.kumar@st.com> Cc: Tom Rix <Tom.Rix@windriver.com> Cc: Mischa Jonker <mjonker@synopsys.com>
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由 Alexey Brodkin 提交于
Data "offset" is not used directly in case of I2C EEPROM. Istead it is split into "block number" and "offset within mentioned block". Which are "addr[0]" and "addr[1]" respectively. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> cc: Peter Tyser <ptyser@xes-inc.com> Cc: Heiko Schocher <hs@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Mischa Jonker <mjonker@synopsys.com>
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由 Heiko Schocher 提交于
remove omap1510 i2c driver, as there is no board which uses it Signed-off-by: NHeiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Jian Zhang <jzhang@ti.com>
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由 Heiko Schocher 提交于
- add zync i2c driver to new multibus/multiadpater support - adapted all config files, which uses this driver Signed-off-by: NHeiko Schocher <hs@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Michal Simek <michal.simek@xilinx.com>
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由 Heiko Schocher 提交于
- add omap24xx driver to new multibus/multiadpater support - adapted all config files, which uses this driver Tested on the am335x based siemens boards rut, dxr2 and pxm2 posted here: http://patchwork.ozlabs.org/patch/263211/Signed-off-by: NHeiko Schocher <hs@denx.de> Tested-by: NTom Rini <trini@ti.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Steve Sakoman <sakoman@gmail.com> Cc: Thomas Weber <weber@corscience.de> Cc: Tom Rix <Tom.Rix@windriver.com> Cc: Grazvydas Ignotas <notasas@gmail.com> Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com> Cc: Luca Ceresoli <luca.ceresoli@comelit.it> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Ilya Yanok <yanok@emcraft.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Nishanth Menon <nm@ti.com> Cc: Pali Rohár <pali.rohar@gmail.com> Cc: Peter Barada <peter.barada@logicpd.com> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Michael Jones <michael.jones@matrix-vision.de> Cc: Raphael Assenat <raph@8d.com> Acked-by: NIgor Grinberg <grinberg@compulab.co.il> Acked-by: NStefano Babic <sbabic@denx.de>
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由 Marek Vasut 提交于
The endless waiting for a bit to be set can cause a hang, add a timeout so we prevent such situation. A testcase for such a hang is below. The testcase assumes a device to be present at address 0x50 and a device to NOT be present at address 0x42 . Also note that the "sleep 1" induced delays are imperative for this bug to manifest . i2c read 0x42 0x0.2 0x10 0x42000000 ; sleep 1 ; \ i2c read 0x50 0x0.2 0x10 0x42000000 ; sleep 1 ; \ i2c read 0x42 0x0.2 0x10 0x42000000 The expected result of the above command is: Error reading the chip. Error reading the chip. While without this patch, we observe a hang in the last read from 0x42 precisely when waiting for this bit to be set. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Heiko Schocher <hs@denx.de> Cc: Stefano Babic <sbabic@denx.de>
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由 Nobuhiro Iwamatsu 提交于
This updates to new I2C framwwork on sh_i2c. And this also updates boards(kzm9g and ecovec) that using sh_i2c. Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
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- 12 11月, 2013 10 次提交
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由 Nikita Kiryanov 提交于
Use scf0403 driver to add scf0403x LCD support for cm-t35 and cm-t3730 boards. Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il> Acked-by: NIgor Grinberg <grinberg@compulab.co.il>
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由 Nikita Kiryanov 提交于
Add DSS_ONOFF to polarity defines Cc: Tom Rini <trini@ti.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il> Acked-by: NIgor Grinberg <grinberg@compulab.co.il> Acked-by: NAnatolij Gustschin <agust@denx.de>
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由 Nikita Kiryanov 提交于
Add SPI-based driver for DataImage SCF0403852GGU04 and SCF0403526GGU20 LCD panels. Cc: Tom Rini <trini@ti.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il> Acked-by: NAnatolij Gustschin <agust@denx.de> Signed-off-by: NAnatolij Gustschin <agust@denx.de>
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由 Nikita Kiryanov 提交于
The flag combination "SPI_XFER_BEGIN | SPI_XFER_END" is a common use case of spi_xfer, and it can easily cause an already long line (spi_xfer takes 5 parameters) to go over the 80 character limit. define SPI_XFER_ONCE to be a shorter version of the above flag combination. Cc: Tom Rini <trini@ti.com> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>
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由 Nikita Kiryanov 提交于
Current implementation only supports 8 bit word lengths, even though omap3 can handle anything between 4 and 32. Update the spi interface to support changing the SPI word length, and implement it in omap3_spi driver to support the full range of possible word lengths. This implementation is backwards compatible by defaulting to the old behavior of 8 bit word lengths. Also, it required a change to the omap3_spi non static I/O functions, but since they are not used anywhere else, no collateral changes are required. Cc: Tom Rini <trini@ti.com> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>
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由 Nikita Kiryanov 提交于
Remove unnecessary semicolon from #define SPI_WAIT_TIMEOUT Cc: Tom Rini <trini@ti.com> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Gerhard Sittig <gsi@denx.de> Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>
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由 Andre Heider 提交于
Depending on the firmware's video options [1] the active SDTV or HDTV mode can yield a framebuffer with noncontiguous horizontal lines, giving a messed up display, for both, u-boot and the loaded kernel. Fix this by setting lcd_line_length to the pitch value of the configured framebuffer. [1] http://elinux.org/RPiconfig#Video_mode_optionsSigned-off-by: NAndre Heider <a.heider@gmail.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: NAnatolij Gustschin <agust@denx.de> Acked-by: NStephen Warren <swarren@wwwdotorg.org>
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由 Anatolij Gustschin 提交于
Remove the redundant lcd_line_length initialisation which sneaked in when an earlier version of the patch of commit 6d330719 has been rebased. Some lcd drivers need to setup lcd_line_length not from the panel_info parameters but by different means. Make the lcd_get_size() weak to allow setting lcd_line_length in a driver specific way. Signed-off-by: NAnatolij Gustschin <agust@denx.de> Cc: Stephen Warren <swarren@wwwdotorg.org>
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由 Andre Heider 提交于
Add the missing "right" field to struct bcm2835_mbox_tag_overscan. Signed-off-by: NAndre Heider <a.heider@gmail.com> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Acked-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>
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由 Wolfgang Denk 提交于
The MPC824x processors have long reached EOL, and the PN62 board has not seen any board-specific updates for more than a decade. It is now causing build issues. Instead of wasting time on things nobody is interested in any more, we rather drop this board. Signed-off-by: NWolfgang Denk <wd@denx.de> Cc: Wolfgang Grandegger <wg@grandegger.com> cc: Tom Rini <trini@ti.com>
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- 11 11月, 2013 2 次提交
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由 Daniel Schwierzeck 提交于
Commit 8dfafdde introduced new gcc warnings on MIPS64: time.c: In function 'tick_to_time': time.c:59:2: warning: comparison of distinct pointer types lacks a cast [enabled by default] time.c:59:2: warning: passing argument 1 of '__div64_32' from incompatible pointer type [enabled by default] In file included from time.c:10:0: ./u-boot-mips/include/div64.h:22:17: note: expected 'uint64_t *' but argument is of type 'long long unsigned int *' time.c: In function 'usec_to_tick': time.c:76:2: warning: comparison of distinct pointer types lacks a cast [enabled by default] time.c:76:2: warning: passing argument 1 of '__div64_32' from incompatible pointer type [enabled by default] In file included from time.c:10:0: ./u-boot-mips/include/div64.h:22:17: note: expected 'uint64_t *' but argument is of type 'long long unsigned int *' Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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