Add in an init function for the drivers/power framework so we can dump
and read the registers via i2c.

Cc: Łukasz Majewski <l.majewski@samsung.com>
Signed-off-by: NTom Rini <trini@ti.com>

Set the active_slave to 1 as slave 1 is pinned out in dra72x base board
Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com>

Add cpsw second slave port pinmux to use it as primary ethernet port
Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com>

To move the arch common function away from board folder to
arch/arm/cpu/armv7/socfpga folder. Its to avoid code duplication
for other non Altera dev kit which is using socfpga device.
Signed-off-by: NChin Liang See <clsee@altera.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Dinh Nguyen <dinguyen@altera.com>
Acked-by: NDetlev Zundel <dzu@denx.de>

Scan Manager driver will be called to configure the IOCSR
scan chain. This configuration will setup the IO buffer settings
Signed-off-by: NChin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Wolfgang Denk <wd@denx.de>
CC: Pavel Machek <pavel@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>

This patch returns back support for old ep93xx processors family
Signed-off-by: NSergey Kostanbaev <sergey.kostanbaev@gmail.com>
Cc: albert.u.boot@aribaud.net

LS2085A is an ARMv8 implementation. This adds board support for emulator
and simulator:
  Two DDR controllers
  UART2 is used as the console
  IFC timing is tightened for speedy booting
  Support DDR3 and DDR4 as separated targets
  Management Complex (MC) is enabled
  Support for GIC 500 (based on GICv3 arch)
Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NArnab Basu <arnab.basu@freescale.com>
Signed-off-by: NJ. German Rivera <German.Rivera@freescale.com>
Signed-off-by: NBhupesh Sharma <bhupesh.sharma@freescale.com>

The armv8 ARM Trusted Firmware (ATF) can be used to load various ATF
images and u-boot, and does this for virtual platforms by using
semihosting. This commit extends this idea by allowing u-boot to also
use semihosting to load the kernel/ramdisk/dtb. This eliminates the need
for a bootwrapper and produces a more realistic boot sequence with
virtual models.

Though the semihosting code is quite generic, support for armv7 in
fastmodel is less useful due to the wide range of available silicon
and the lack of a free armv7 fastmodel, so this change contains an
untested armv7 placeholder for the service trap opcode.

Please refer to doc/README.semihosting for a more detailed description
of semihosting and how it is used with the armv8 virtual platforms.
Signed-off-by: NDarwin Rambo <drambo@broadcom.com>
Cc: trini@ti.com
Cc: fenghua@phytium.com.cn
Cc: bhupesh.sharma@freescale.com

The u-boot Overo board actually supports both Overo (OMAP35xx)
and Overo Storm (AM/DM37xx) COMs with a range of different expansion
boards.  This provides a mechanism to select the an appropriate device
tree file based on the processor version and, if available, the
expansion board ID written on the expansion board EEPROM. To match the
3.15+ kernels, fdtfile names have this format:
 "omap3-overo[-storm]-<expansion board name>.dtb"

By default, we use "omap3-overo-storm-tobi.dtb".
Signed-off-by: NAsh Charles <ashcharles@gmail.com>

Conflicts:
	include/configs/omap3_overo.h

AM437x Starter Kit has a qspi flash and gbit ethernet
support. By muxing those signals, we can use those
interfaces from u-boot.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

pass correct PHY Address when running on SK
so that we have working ethernet with this board
too.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

AM43xx Starter Kit is a new board based on
AM437x line of SoCs. Being a low-cost EVM and
small size EVM are intended to provide an entry
level development platform on a full fledged
Hardware System.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

when porting u-boot to a new am43xx board, it
helps to know the name of the current unsupported
board so we don't have to hunt for design documents
to figure out what's written in the EEPROM.
Signed-off-by: NFelipe Balbi <balbi@ti.com>

Move AEMIF driver to drivers/memory/ti-aemif.c along with AEMIF
definitions collected in arch/arm/include/asm/ti-common/ti-aemif.h
Acked-by: NVitaly Andrianov <vitalya@ti.com>
Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@ti.com>

The definitions inside emif_defs.h concern davinci nand driver and
should be in it's header. So create header file for davinci nand
driver and move definitions from emif_defs.h and nand_defs.h to it.
Acked-by: NVitaly Andrianov <vitalya@ti.com>
Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@ti.com>
[trini: Fixup more davinci breakage]
Signed-off-by: NTom Rini <trini@ti.com>

nios-32 arch was removed back in 2010 (1117cbf2). Code depending on
its headers (nios.h, nios-io.h) can't possibly compile since then.
As it wasn't fixed till now it is safe to remove.
Signed-off-by: NVasili Galka <vvv444@gmail.com>

commit 18b06652 "tools: include u-boot version of sha256.h"
unconditionally forced the sha256.h from u-boot to be used
for tools instead of the host version. This is fragile though
as it will also include the host version. Therefore move it
to include/u-boot to join u-boot/md5.h etc which were renamed
for the same reason.

cc: Simon Glass <sjg@chromium.org>
Signed-off-by: NJeroen Hofstee <jeroen@myspectrum.nl>

Fix the following warning messages:

In function 'flash_erase': 180:21:
warning: variable 'last' set but not used [-Wunused-but-set-variable]
In function 'write_buff':  322:10:
warning: variable 'port_width' set but not used [-Wunused-but-set-variable]
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Cc: TsiChung Liew <Tsi-Chung.Liew@freescale.com>

From comparison of current logic and the logic that was prior to commit
aba27acf, we see that first parameter of FPGA_GET_REG() shall be the
FPGA index and not channel number. The re-factoring in commit aba27acf
accidentally changed that.

Cc: Stefan Roese <sr@denx.de>
Acked-by: NDirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: NVasili Galka <vvv444@gmail.com>

Generic board support is now enabled for Exynos 4, and if any
init function returns an error then the init process is stopped.

This makes a boot issue on the Trats and Trats2 devices. If the device
is supplied by USB cable or an external power supply then it can't boot
because function exynos_power_init returns an error. Now this function
returns 0 if battery is not connected.
Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Piotr Wilczek <p.wilczek@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

Explain the necessary steps in order to boot from SPI NOR.

Based on a earlier submission from Mårten Wikman.
Signed-off-by: NMårten Wikman <marten.wikman@novia.fi>
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

Clang interpretes an if condition like  "if ((a = b) == NULL)
as it tries to assign a value in a statement. Hence if you do
"if ((something)) it warns you that you might be confused.
Hence drop the double braces for plane if statements.

cc: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: NJeroen Hofstee <jeroen@myspectrum.nl>

cc: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: NJeroen Hofstee <jeroen@myspectrum.nl>

this prevent some warnings when compiling with clang

cc: Stelian Pop <stelian@popies.net>
Signed-off-by: NJeroen Hofstee <jeroen@myspectrum.nl>

Signed-off-by: NVasili Galka <vvv444@gmail.com>

This prevents some warnings when building with clang.
cc:: andreas.devel@googlemail.com
Signed-off-by: NJeroen Hofstee <jeroen@myspectrum.nl>

Most of the warnings seem to be related to using 'int' for size_t. Change
this and fix up the remaining warnings and problems. For bootm, the warning
was masked by others, and there is an actual bug in the code.
Signed-off-by: NSimon Glass <sjg@chromium.org>

run_command() returns 0 for success, 1 for failure. Fix places which
assume that failure is indicated by a negative return code.
Signed-off-by: NThomas Betker <thomas.betker@rohde-schwarz.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Tested-by: NSimon Glass <sjg@chromium.org>
Tested-by: NStefan Roese <sr@denx.de>

Correct the binary output so that image_binary_size is really at the
end of the image.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Correct the binary output so that image_binary_size is really at the
end of the image.
Signed-off-by: NSimon Glass <sjg@chromium.org>

This should include the hash so that image_binary_size is really at the
end of the image, and not some 300 bytes earlier.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Add QSPI support for VF610TWR, such as clock and iomux.
Signed-off-by: NAlison Wang <Huan.Wang@freescale.com>
Signed-off-by: NChao Fu <b44548@freescale.com>

This family is supported by the TPS65218 PMIC.  Implement a scale_vcores
to set the MPU and CORE voltage correctly to the max frequency that is
supported (and what we will be scaling them to in setup_dplls()).
Signed-off-by: NTom Rini <trini@ti.com>

Signed-off-by: NTom Rini <trini@ti.com>

Cc: trini@ti.com
Signed-off-by: NHannes Petermaier <oe5hpm@oevsv.at>

if we have no NAND-Chip, we don't need the gpmc-controller and therefore
is no need to init it.

Cc: trini@ti.com
Signed-off-by: NHannes Petermaier <oe5hpm@oevsv.at>

Cc: trini@ti.com
Signed-off-by: NHannes Petermaier <oe5hpm@oevsv.at>

The ePOS EVM and EVM SK have QSPI as an option to boot.  Add a qspiboot
target that utilizes QSPI for env and so forth as an example of best
practices.  As QSPI is booted from directly we need to chang
CONFIG_SYS_TEXT_BASE.

Note that on ePOS EVM the QSPI and NAND are mutually exclusive choices
we need to handle that elsewhere, once NAND support is also added.
Signed-off-by: NSourav Poddar <sourav.poddar@ti.com>
Signed-off-by: NTom Rini <trini@ti.com>

OMAP3 used GPMC_NAND_ECC_LP_x8_LAYOUT and GPMC_NAND_ECC_LP_x16_LAYOUT macros
to configure GPMC controller for x7 or x8 bit device connected to its interface.
Now this information is encoded in CONFIG_SYS_NAND_DEVICE_WIDTH macro, so above
macros can be completely removed.
Signed-off-by: NPekon Gupta <pekon@ti.com>

Switch to an SPL image. The SPL for Ventana does the following:
 - setup i2c and read the factory programmed EEPROM to obtain DRAM config
   and model for board-specific calibration data
 - configure DRAM per CPU/size/layout/devices/calibration
 - load u-boot.img from NAND and jump to it

This allows for a single SPL+u-boot.img to replace the previous multiple boa
configurations.

Cc: Stefan Roese <sr@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Andy Ng <andreas2025@gmail.com>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Tapani Utriainen <tapani@technexion.com>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: NTim Harvey <tharvey@gateworks.com>