Add imx6 thermal device to mx6 soc file. Read the cpu temperature
using this device to access onchip thermal sensor.
Signed-off-by: NYe.Li <B37916@freescale.com>
Signed-off-by: NNitin Garg <nitin.garg@freescale.com>

Add a new thermal uclass for thermal sensor and implement the imx
thermal driver basing on this uclass.
Signed-off-by: NYe.Li <B37916@freescale.com>
Acked-by: NStefano Babic <sbabic@denx.de>

Add api to check and enable pll3 as required
for thermal sensor driver.
Signed-off-by: NYe.Li <B37916@freescale.com>
Signed-off-by: NNitin Garg <nitin.garg@freescale.com>

When an invalid USDHC port is passed we should return -EINVAL instead of 0.
Also, return the error immediately on fsl_esdhc_initialize() failure.

Based on similar patches by Fabio Estevam for mx6sabresd, mx53loco, wandboard
Signed-off-by: NSoeren Moch <smoch@web.de>
Acked-by: NStefano Babic <sbabic@denx.de>

Add the pfuze100 initialization in power_init_board for imx6q/dl
sabreauto board.
Signed-off-by: NYe.Li <B37916@freescale.com>

Modify the pfuze init for mx6sxsabresd to use the shared
"pfuze_common_init" function. And move this initialization to
power_init_board.
Signed-off-by: NYe.Li <B37916@freescale.com>

Modify the pfuze init for mx6sabresd to use the shared
"pfuze_common_init" function. And move this initialization to
power_init_board.
Signed-off-by: NYe.Li <B37916@freescale.com>

Since the Pfuze initializations are similar on various mx6 SABRE
boards. Factorize the initialization to a common function in file
board/freescale/common/pfuze.c. So that all SABRE boards BSP can
share the function.
Signed-off-by: NYe.Li <B37916@freescale.com>

Add definitions for buck regulators (SW1A/B/C) registers and voltage
values.
Signed-off-by: NYe.Li <B37916@freescale.com>
Reviewed-by: NPrzemyslaw Marczak <p.marczak@samsung.com>

Add full support for USDHC2, USDHC3, USDHC4 on mx6sx sabresd board.
The default boot socket is USDHC4, so the MMC environment device and
mmcdev variable are set to this device.
Signed-off-by: NYe.Li <B37916@freescale.com>

The reset value of "uSDHCx_INT_STATUS_EN" register is changed to 0
on iMX6SX. So the fsl_esdhc driver must update to set the register,
otherwise no state can be detected.
Signed-off-by: NYe.Li <B37916@freescale.com>

In U-boot it is preferred to access the register via structure pointer, so
convert it such style.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

Signed-off-by: NMarkus Niebel <Markus.Niebel@tq-group.com>

setup_i2c has a return value. Use it to give feedback
on error.
Signed-off-by: NMarkus Niebel <Markus.Niebel@tq-group.com>

Add include needed to have prototype for board_spi_cs_gpio
Signed-off-by: NMarkus Niebel <Markus.Niebel@tq-group.com>

This is nowhere documented and only used
by two other boards. Replace it with
TQMA6_SPI_FLASH_SECTOR_SIZE.
Signed-off-by: NMarkus Niebel <Markus.Niebel@tq-group.com>

Let's add mx6sabresd_spl_defconfig entry into MAINTAINERS, so that we avoid
getting a warning that the mx6sabresd_spl is not maintained.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

We can simply the return the value from enable_fec_anatop_clock() to make the
code smaller and simpler.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

We can simply the return the value from enable_fec_anatop_clock() to make the
code smaller and simpler.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

Make clear that current SPL code only supports the mx6q variant.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

When an invalid USDHC port is passed we should return -EINVAL instead of 0.

Also, return the error immediately on fsl_esdhc_initialize() failure.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

When an invalid USDHC port is passed we should return -EINVAL instead of 0.

Also, return the error immediately on fsl_esdhc_initialize() failure.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>

mx6sabreauto boards come with 32 MiB of parallel NOR flash.

Add support for it:

U-Boot 2015.01-rc1-18107-g1543636-dirty (Nov 14 2014 - 11:11:04)

CPU:   Freescale i.MX6Q rev1.2 at 792 MHz
Reset cause: POR
Board: MX6Q-Sabreauto revA
I2C:   ready
DRAM:  2 GiB
Flash: 32 MiB
NAND:  0 MiB

Due to pin conflict with I2C3, only define configure I2C3 IOMUX when flash is
not used.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

Move MX5 specific set_chipselect_size function into generic i.MX part,
such that MX6 based boards are able to use this function as well.

While doing this the iomuxc gpr member needed to be consolidated between
MX5 and MX6.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

Many boards use a minimal .cfg file in the SPL case.

Introduce spl_sd.cfg so that we can reuse it.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NStefano Babic <sbabic@denx.de>

mx6sabresd_spl.cfg configures CCM registers, GPR registers and CCM_CCOSR.

Move the configuration to the spl code.

CCM_CCOSR setting is no longer required to get audio functionality in the
kernel, so remove such setting.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: NMarek Vasut <marex@denx.de>

mx6sabresd_spl.cfg configures CCM registers, GPR registers and CCM_CCOSR.

Move the configuration to the spl code.

CCM_CCOSR setting is no longer required to get audio functionality in the
kernel, so remove such setting.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

mx6sabresd_spl.cfg configures CCM registers, GPR registers and CCM_CCOSR.

Move the configuration to the spl code.

CCM_CCOSR setting is no longer required to get audio functionality in the
kernel, so remove such setting.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

Commit 3ff46cc4 fixed exception vectors setting in
the general ARM case, by either copying the exception
and indirect vector tables to normal (0x00000000) or
high (0xFFFF0000) vectors address, or setting VBAR to
U-Boot's base if applicable.

i.MX27 SoC is ARM926E-JS, thus has only normal and
high options, but does not provide RAM at 0xFFFF0000
and has only ROM at 0x00000000; it is therefore not
possible to move or change its exception vectors.

Besides, i.MX27 ROM code does provide an indirect
vectors table but at a non-standard address and with
the reset and reserved vectors missing.

Turn the current vector relocation code into a weak
routine called after relocate_code from crt0, and add
strong version for i.MX27.

Series-Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>
Reviewed-by: NStefano Babic <sbabic@denx.de>
Tested-by: NStefano Babic <sbabic@denx.de>
Tested-by: NPhilippe Reynes <tremyfr@gmail.com>
Tested-by: NPhilippe Reynes <tremyfr@yahoo.fr>

Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>

Since USDHC1 and USDHC3 added, the dev index for USDHC2 changed to
1. So modify the default mmcdev in environment variables to dev 1.
Signed-off-by: NYe.Li <B37916@freescale.com>

The PFUZ probe failed with the following msg:
" wait_for_sr_state: failed sr=81 cr=a0 state=2020
  i2c_init_transfer: failed for chip 0x8 retry=0
  wait_for_sr_state: failed sr=81 cr=a0 state=2020
  i2c_init_transfer: failed for chip 0x8 retry=1
  wait_for_sr_state: failed sr=81 cr=a0 state=2020
  i2c_init_transfer: failed for chip 0x8 retry=2
  i2c_init_transfer: give up i2c_regs=021a0000
  Can't find PMIC:PFUZE100 "

board_early_init_f is too early to call i2c related setting, because
init_func_i2c is called after board_early_init_f being invoked. Thus
move setup_i2c into board_init.

Also PFUZ is connected to I2C bus 0, so change "1" -> "0".

Using this patch PFUZ can be correctly probed:
"PMIC:  PFUZE100 ID=0x11"
Signed-off-by: NPeng Fan <Peng.Fan@freescale.com>
Acked-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NStefano Babic <sbabic@denx.de>

mkimage -T mxs now support new flag in config file:
DISPLAYPROGRESS - makes boot process print HTLLC characters for each BootROM
instruction.
Signed-off-by: NAlexey Ignatov <lexszero@gmail.com>

The code for this board supports following features:
  - Boot media support: NAND flash/SD card/SPI flash
  - Support LCD display (optional, disabled by default)
  - Support ethernet
  - Support USB mass storage
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

The code for this board supports following features:
  - Boot media support: NAND flash/SD card/SPI flash
  - Support LCD display
  - Support ethernet
  - Support USB mass storage
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

The User Register in GMAC IP is used to select interface type.
When with GE feature, it is used to select interface between
RGMII and GMII. If without GE feature, it is used to select
interface between MII and RMII.
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

As in SAMA5D4 SoC, the gf table in ROM code can not be seen.
So, when we try to use PMECC, we need to build it when do
initialization.
Add a macro NO_GALOIS_TABLE_IN_ROM in soc header file. If it
is defined we will build gf table runtime.

The PMECC use the BCH algorithm, so based on the build_gf_tables()
function in lib/bch.c, we can build the Galois Field lookup table.
Signed-off-by: NJosh Wu <josh.wu@atmel.com>
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

replaces the at91bootstrap code with SPL code.
make the spl image with:
./tools/mkimage -T atmelimage -d spl/u-boot-spl.bin spl/boot.bin

this writes the length of the spl image into the 6th
execption vector. This is needed from the ROM bootloader.
Signed-off-by: NHeiko Schocher <hs@denx.de>
Reviewed-by: NBo Shen <voice.shen@atmel.com>
Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>