- 29 4月, 2015 4 次提交
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由 Nathan Rossi 提交于
The PicoZed is a System-on-Module board which is marketed as part of the ZedBoard/MicroZed/etc. collection. It includes a Zynq-7000 processor. This patch adds support that covers all the variants of the PicoZed including the SKUs with Z7010/Z7020 and Z7015/Z7030 Zynq chips. This patch set however only covers support for the System-on-Module and does not cover any extra components that are available on carrier boards (except those that are fanned out of the module itself). More information on this board, its variants and available carrier boards is available at: http://zedboard.org/product/picozedSigned-off-by: NNathan Rossi <nathan.rossi@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
On slow platforms not all baudrate setting is valid. Check it directly in the driver and setup maximum possible frequency. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Enable GPIO driver and GPIO commands. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Andrea Scian 提交于
Most of the code is taken (and adapted) from Linux kernel driver. Just add CONFIG_ZYNQ_GPIO to you config to enable it Signed-off-by: NAndrea Scian <andrea.scian@dave.eu> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 28 4月, 2015 4 次提交
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Upto now flash sector_size is assigned from params which isn't necessarily a sector size from vendor, so based on the SECT_* flags from flash_params the erase_size will compute and it will become the sector_size finally. Bug report (from Bin Meng): => sf probe SF: Detected SST25VF016B with page size 256 Bytes, erase size 4 KiB, total 2 MiB, mapped at ffe00000 => sf erase 0 +100 SF: 65536 bytes @ 0x0 Erased: OK Signed-off-by: NJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Reported-by: NBin Meng <bmeng.cn@gmail.com> Tested-by: NBin Meng <bmeng.cn@gmail.com>
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由 Bin Meng 提交于
With SPI flash moving to driver model, commit fbb09918 "dm: Convert spi_flash_probe() and 'sf probe' to use driver model" ignored the SST flash-specific write op (byte program & word program), which actually broke the SST flash from wroking. This commit makes SST flash work again under driver model, by adding SST flash-specific handling in the spi_flash_std_write(). Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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由 Bin Meng 提交于
Add a new member 'flags' in struct spi_flash to store the flash flags during spi_flash_validate_params(). Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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- 27 4月, 2015 1 次提交
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由 David Dueck 提交于
The timeout value is never reset during the transfer. This means that when transferring more data we eventually trigger the timeout. This was reported on the mailing list: "Spansion SPI flash read timeout with AM335x" Signed-off-by: NDavid Dueck <davidcdueck@googlemail.com> CC: Tom Rini <trini@konsulko.com> CC: Stefan Roese <sr@denx.de> CC: Andy Pont <andy.pont@sdcsystems.com> Tested-by: NDavid Dueck <davidcdueck@googlemail.com> Reviewed-by: NJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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- 25 4月, 2015 3 次提交
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- 24 4月, 2015 28 次提交
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由 Daniel Schwierzeck 提交于
Add device-tree handover to Linux kernel conforming with MIPS UHI [1]. Register $a0 will be set to the reserved value -2. The address of the device-tree blob will be stored as KSEG0 address in $a1. $a2 and $a3 are set to zero. [1] http://prplfoundation.org/wiki/MIPS_documentationSigned-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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由 Hans de Goede 提交于
After syncing the sunxi dts files with the upstream kernel dm/fdt sunxi builds would no longer boot. The problem is that stdout-path is now set like this in the upstream dts files: stdout-path = "serial0:115200n8". The use of options in of-paths, either after an alias name, or after a full path, e.g. stdout-path = "/soc@01c00000/serial@01c28000:115200", is standard of usage, but something which the u-boot dts code so far did not handle. This commit fixes this, adding support for both path formats. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 York Sun 提交于
This erratum requires setting GLITCH_EN bit in debug register to enable digital filter to improve clock stability. Signed-off-by: NYork Sun <yorksun@freescale.com> CC: Heiko Schocher <hs@denx.de>
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由 Yangbo Lu 提交于
This patch adds esdhc support for ls2085a. Signed-off-by: NYangbo Lu <yangbo.lu@freescale.com> Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 Scott Wood 提交于
Enable NAND boot support using SPL framework. To boot from NAND, either use DIP switches on board, or "qixis_reset nand" command. Details of forming NAND image can be found in README. Signed-off-by: NScott Wood <scottwood@freescale.com> [York Sun: Remove +S from defconfig after commit 252ed872] Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 Scott Wood 提交于
Use "qixis_reset nand" to reset the board to boot from NAND. Signed-off-by: NScott Wood <scottwood@freescale.com> Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 Scott Wood 提交于
This adds NAND boot support for LS2085AQDS, using SPL framework. Details of forming NAND image can be found in README. Signed-off-by: NScott Wood <scottwood@freescale.com> [York Sun: Remove +S from defconfig after commit 252ed872] Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 Jaiprakash Singh 提交于
IFC has two register pages.Till IFC version 1.4 each register page is 4KB each.But IFC ver 2.0 register page size is 64KB each.IFC regiters structure is break into two viz FCM and RUNTIME.FCM(Flash control machine) registers are defined in PAGE0 and controls IFC generic functionality. RUNTIME registers are defined in PAGE1 and controls NAND and GPCM funcinality. FCM and RUNTIME structures defination is common for IFC version 1.4 and 2.0. Signed-off-by: NJaiprakash Singh <b44839@freescale.com> Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 Prabhakar Kushwaha 提交于
Add support of ethernet: - eth.c: mapping lane to slot for (0x2A, 0x07) - ls2085a.c: To enable/disable dpmac and get link type Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 Sanchayan Maity 提交于
Enable USB support on Toradex Colibri Vybrid Modules. Signed-off-by: NSanchayan Maity <maitysanchayan@gmail.com> Acked-by: NMarek Vasut <marex@denx.de>
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由 Sanchayan Maity 提交于
This driver adds support for the USB peripheral on Freescale Vybrid SoC's. Signed-off-by: NSanchayan Maity <maitysanchayan@gmail.com>
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由 Sanchayan Maity 提交于
This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by: NSanchayan Maity <maitysanchayan@gmail.com> Acked-by: NStefan Agner <stefan@agner.ch>
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由 Stefan Agner 提交于
Enables caches which provides a rather huge speedup of the boot loader. Also mark the on-chip RAM as cachable since this is the area U-Boot runs from. Signed-off-by: NSanchayan Maity <maitysanchayan@gmail.com>
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由 Sanchayan Maity 提交于
Vybrid product family consists of several rather similar SoC which can be determined by softare during boot time. This allows use of variable ${soc} for Linux device tree files. Detect VF5xx CPU's by reading the CPU count register. We can determine the second number of the CPU type (VF6x0) which indicates the presence of a L2 cache. Signed-off-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NSanchayan Maity <maitysanchayan@gmail.com>
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由 Stefan Agner 提交于
Enable the SCSC (Slow Clock Source Controller) and select the external 32KHz oscillator. This improves the accuracy of the RTC. Signed-off-by: NSanchayan Maity <maitysanchayan@gmail.com>
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由 Sanchayan Maity 提交于
In order to avoid code duplication, move the DDR3 initialization to the common place under imx-common. Currently ROW_DIFF and COL_DIFF can be chosen from the board file. The JEDEC timings are specified using a common ddr3_jedec_timings structure. Signed-off-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NSanchayan Maity <maitysanchayan@gmail.com>
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由 Heiko Schocher 提交于
add subpagesize, nand options and bbt options to the "nand info" output. => nand info Device 0: nand0, sector size 256 KiB Page size 4096 b OOB size 256 b Erase size 262144 b subpagesize 4096 b options 0x 200 bbt options 0x 8000 Signed-off-by: NHeiko Schocher <hs@denx.de>
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由 Marek Vasut 提交于
Some RTC chips tend to set garbage date after reset. This patch sets the date to 2000-01-01 00:00 immediatelly after the RTC chip reset is issued using the "date reset" command. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@konsulko.com>
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由 Bryan De Faria 提交于
Correct and complete the mux names following AM437x Technical Reference Manual. Signed-off-by: NBryan De Faria <bdefaria-ext@adeneo-embedded.com>
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由 angelo@sysam.it 提交于
Add architecture-specific u-boot.lds and remove all board-specific u-boot.lds. All the .text customization that was board-specific have been moved inside the related include/configs, inside a LDS_BOARD_TEXT define. Signed-off-by: NAngelo Dureghello <angelo@sysam.it>
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由 Dileep Katta 提交于
Implemented fb_set_reboot_flag() for OMAP5 to set an environment variable 'dofastboot' when reboot-bootloader called. This environment variable will be checked in boot command and fastboot will be called if the variable is set. If the bootcmd env variable of OMAP5 common is overwritten with board-specific command, then these changes will not apply. This was originally intended for DRA7 platform, but now applies to all OMAP5. Ref: http://git.omapzoom.org/?p=repo/u-boot.git;a=commit;h=19da2e436e9806259cf1f4988b9e046ab256bf2cSigned-off-by: NAngela Stegmaier <angelabaker@ti.com> Signed-off-by: NDileep Katta <dileep.katta@linaro.org> Reviewed-by: NTom Rini <trini@konsulko.com> [trini: Make it check for !CONFIG_ENV_IS_NOWHERE as we can't saveenv() in that case] Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Wu, Josh 提交于
For the local project, we may specified format.subjectprefix setting. Then the patch will be formated as [Project_prefix][PATCH]. But patman will not check this setting. It will remove the format.subjectprefix. So This patch will let patman check this setting and add it as a project prefix. Signed-off-by: NJosh Wu <josh.wu@atmel.com> Acked-by: NSimon Glass <sjg@chromium.org> Tested-by: NSimon Glass <sjg@chromium.org>
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由 Michal Simek 提交于
Also read gcc 4.9.0 at kernel.org which also have Microblaze toolchain. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Acked-by: NSimon Glass <sjg@chromium.org> Tested-by: NSimon Glass <sjg@chromium.org> Fixed unit test failure by updating the test: Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Dileep Katta 提交于
This patch populates serial number environment variable from die_id_0 and die_id_1 register values for DRA7xx boards. The function is added in omap common code so that this can be re-used. Serial# environment variable will be useful to show correct information in "fastboot devices" commands. Ref: http://git.omapzoom.org/?p=repo/u-boot.git;a=commit;h=a6bcaaf67f6e4bcd97808f53d0ceb4b0c04d583cSigned-off-by: NAngela Stegmaier <angelabaker@ti.com> Signed-off-by: NDileep Katta <dileep.katta@linaro.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Dileep Katta 提交于
- Fastboot is enable by default for DRA7XX - This is based on following patch modified accordingly http://git.omapzoom.org/?p=repo/u-boot.git;a=commit;h=b2e04f92b5d91c708b6fd6b79d2266966ac51f4bSigned-off-by: NAngela Stegmaier <angelabaker@ti.com> Signed-off-by: NDileep Katta <dileep.katta@linaro.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Zhou Zhu 提交于
The Marvell GPIO driver can be used on Marvell platforms other than Sheeva, so remove the ifdef to enable it for others. Signed-off-by: NRob Herring <robh@kernel.org>
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