- 16 7月, 2010 16 次提交
-
-
由 Kumar Gala 提交于
Add 'errata' command to report what errata we workaround. Report workaround for erratum SATA-A001 on P1022/P1013. Also sorted the CONFIG_CMD_* list. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Timur Tabi 提交于
Specifics: 1) 36-bit only 2) Booting from NOR flash only 3) Environment stored in NOR flash only 4) No SPI support 5) No DIU support Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Timur Tabi 提交于
Add the LAW target (enum law_trgt_if) to the fsl_pci_info structure, so that we can capture the LAW target for a given PCI or PCIE controller. Also update the SET_STD_PCI_INFO and SET_STD_PCIE_INFO macros to assign the LAW_TRGT_IF_PCI[E]_x macro to the LAW target field of the structure. This will allow future PCI[E] code to configure the LAW target automatically, rather than requiring each board to it for each PCI controller separately. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Kumar Gala 提交于
The e5500 has a link register stack and segment target address cache. Its safe to enable these bits on older e500 cores as the bits are implemented in the register. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Kumar Gala 提交于
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Becky Bruce 提交于
Each platform had its own version of the upmconfig, despite the init process being identical. Now that we have a spot for common lbc code, create a common upmconfig() there. Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org> Acked-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Becky Bruce 提交于
The new command dumps the TLBCAM, the LAWs, and the BR/OR regs. Add CONFIG_CMD_REGINFO to the config for all MPC85xx parts. Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Becky Bruce 提交于
The current code redefines functions based on FSL_CORENET_ vs not - create macros/inlines instead that hide the differences. Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Becky Bruce 提交于
This dumps out the contents of TLB1 on 85xx-based systems. Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Becky Bruce 提交于
Extract the operation to read a tlb into a function - we will need this later to print out the tlbs, and there's no point in duplicating the code. Create a TSIZE_TO_BYTES macro to deal with the conversion from the MAS field to an actual size instead of duplicating this in code. There are a few misc other minor cleanups. Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Becky Bruce 提交于
Currently, 83xx, 86xx, and 85xx have a lot of duplicated code dedicated to defining and manipulating the LBC registers. Merge this into a single spot. To do this, we have to decide on a common name for the data structure that holds the lbc registers - it will now be known as fsl_lbc_t, and we adopt a common name for the immap layouts that include the lbc - this was previously known as either im_lbc or lbus; use the former. In addition, create accessors for the BR/OR regs that use in/out_be32 and use those instead of the mismash of access methods currently in play. I have done a successful ppc build all and tested a board or two from each processor family. Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org> Acked-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Kumar Gala 提交于
If we explicitly disabled a core remove it from the dtb we pass on to the kernel. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Kumar Gala 提交于
We may have cpu-handles pointing to the cpu nodes we delete. If so we should delete the handles as well. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Kim Phillips 提交于
Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Kim Phillips 提交于
CONFIG_SYS_FSL_SEC_COMPAT is set to 2 for the SEC 2.x and SEC 3.x. Parts with newer SEC h/w versions will increment the number to accomodate incompatible code changes. Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Kim Phillips 提交于
Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
- 14 7月, 2010 2 次提交
-
-
由 Mike Frysinger 提交于
The L1 regions of Core B are not directly accessible from Core A, so we need to use DMA to get at them. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
-
由 Mike Frysinger 提交于
Use the new portmux framework to handle the details when possible. Unfortunately, we cannot yet use this in the standalone initialization logic, so we need to keep around the old portmux writes for now. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
-
- 13 7月, 2010 2 次提交
-
-
由 Albert Aribaud 提交于
Add definitions and initialization in orion5x for mvgbe. Add orion5x in mvgbe SoC includes. Signed-off-by: NAlbert Aribaud <albert.aribaud@free.fr> Acked-by: NPrafulla Wadaskar <prafulla@marvell.com> Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
-
由 Albert Aribaud 提交于
Rename all references to kirkwood in mvgbe symbols throughout the whole codebase. Signed-off-by: NAlbert Aribaud <albert.aribaud@free.fr> Acked-by: NPrafulla Wadaskar <prafulla@marvell.com> Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
-
- 12 7月, 2010 3 次提交
-
-
由 Thomas Chou 提交于
This will be used by nand_plat. Signed-off-by: NThomas Chou <thomas@wytron.com.tw> Signed-off-by: NScott McNutt <smcnutt@psyent.com>
-
由 Thomas Chou 提交于
This patch adds fdt support to boot linux, followed Michal's work on microblaze. Signed-off-by: NThomas Chou <thomas@wytron.com.tw> Signed-off-by: NScott McNutt <smcnutt@psyent.com>
-
由 Thomas Chou 提交于
Follow the discussion of Charles Manning and Mike Frysinger. Using gc_sections helps reduce image size. Configuring for nios2-generic board... Before, text data bss dec hex filename 123979 3724 22892 150595 24c43 /tmp/u-boot/u-boot After, text data bss dec hex filename 115983 3800 22732 142515 22cb3 /tmp/u-boot/u-boot Signed-off-by: NThomas Chou <thomas@wytron.com.tw> Signed-off-by: NScott McNutt <smcnutt@psyent.com>
-
- 10 7月, 2010 1 次提交
-
-
由 Ilya Yanok 提交于
This patch adds basic support for Freescale MPC8308 CPU. Serial ports, NOR flash and integrated Ethernet controllers are supported. PCI Express is also supported. eSDHC, NAND and USB may work but aren't tested (using ULPI PHY requires additional patch). Signed-off-by: NIlya Yanok <yanok@emcraft.com> Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
-
- 05 7月, 2010 8 次提交
-
-
由 Mike Frysinger 提交于
Now that we have a unified gpio layer, the misc partial gpio commands can be unified and made complete (support all possible gpios). Signed-off-by: NMike Frysinger <vapier@gentoo.org>
-
由 Mike Frysinger 提交于
The current pinmux handling has spread throughout Blackfin drivers and board code and is getting hideous to maintain. So import the gpio and portmux layer from the Blackfin Linux code. This should spur a serious of cleanups across the Blackfin tree. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
-
由 Mike Frysinger 提交于
Older on-chip Blackfin bootroms do not create a dummy NMI handler, so set up one ourselves when anomaly 05000219 applies. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
-
由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
-
由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
-
由 Mike Frysinger 提交于
The default storage location for bootcount is EVT0. This version uses one 32bit value and combines the magic/count value in the upper/lower 16bits. If there is demand for more, should be easy to do. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
-
由 Mike Frysinger 提交于
Avoid banging on the trace MMRs when debugging is disabled, avoid calling the funcs multiple times in a row, disable the trace buffer earlier in the exception handler to avoid eating more user entries, and dump the buffer before calling the kgdb hook. This way we maximize useful debugging info up front rather than needing external tools (like gdb/serial/etc...). Signed-off-by: NMike Frysinger <vapier@gentoo.org>
-
由 Wolfgang Denk 提交于
The hush shell dynamically allocates (and re-allocates) memory for the argument strings in the "char *argv[]" argument vector passed to commands. Any code that modifies these pointers will cause serious corruption of the malloc data structures and crash U-Boot, so make sure the compiler can check that no such modifications are being done by changing the code into "char * const argv[]". This modification is the result of debugging a strange crash caused after adding a new command, which used the following argument processing code which has been working perfectly fine in all Unix systems since version 6 - but not so in U-Boot: int main (int argc, char **argv) { while (--argc > 0 && **++argv == '-') { /* ====> */ while (*++*argv) { switch (**argv) { case 'd': debug++; break; ... default: usage (); } } } ... } The line marked "====>" will corrupt the malloc data structures and usually cause U-Boot to crash when the next command gets executed by the shell. With the modification, the compiler will prevent this with an error: increment of read-only location '*argv' N.B.: The code above can be trivially rewritten like this: while (--argc > 0 && **++argv == '-') { char *arg = *argv; while (*++arg) { switch (*arg) { ... Signed-off-by: NWolfgang Denk <wd@denx.de> Acked-by: NMike Frysinger <vapier@gentoo.org>
-
- 01 7月, 2010 7 次提交
-
-
由 Stefan Roese 提交于
Background Info: Some PPC440/460 boards have caches enabled in the Boot/FLASH TLB (via init.S) to speed up the boot process. In relocate_code (start.S) the cache inhibit attribute for this TLB is set to disable cache. This is needed for the CFI FLASH driver. This patch now cleans this code up: - CONFIG_SYS_TLB_FOR_BOOT_FLASH is defined to 0 (default TLB) if not defined in the top of this file. This way, we can remove an ugly #ifdef in this code. - Replace complex "#if defined(CONFIG_440EP) || defined(CONFIG_GR)..." statement with "#if defined(CONFIG_440)". - Remove unnecessary cache invalidate calls resulting in faster bootup. Signed-off-by: NStefan Roese <sr@denx.de>
-
由 Stefan Roese 提交于
This patch adds some DDR(2) macros to all PPC4xx's equipped with this IBM DDR1/2 controller. Signed-off-by: NStefan Roese <sr@denx.de>
-
由 Stefan Roese 提交于
As described in item #10 of the SDRAM initialization (chapter 22.2.9 of the PPC460EX/EXr/GT users manual), RDSS may need to be adjusted. The code for this is now factored out and executed for non-SPD based boards as well. Signed-off-by: NStefan Roese <sr@denx.de>
-
由 Stefan Roese 提交于
This patch makes it possible to overwrite the default auto-calibration scan window (SDRAM_WRDTR.[WDTR], SDRAM_CLKTR.[CKTR] values) with board specific values. The parameters of the weak default function are corrected as well. This way we don't need the casts any more. This feature will be used by an upcoming PPC460GT board port. Signed-off-by: NStefan Roese <sr@denx.de>
-
由 Stefan Roese 提交于
By not defining CONFIG_SYS_PCI_MASTER_INIT and CONFIG_SYS_PCI_TARGET_INIT, PCI support (host and adapter) will not be enabled. But it's still possible to use the U-Boot PCI infrastructure for the PCIe ports. This configuration option is needed for a new 460GT board, which uses PCIe but has PCI disabled. Signed-off-by: NStefan Roese <sr@denx.de>
-
由 Stefan Roese 提交于
This patch enables booting with option E on the PPC460EX/EXr/GT. When booting with Option E, the PLL is in bypass, CPR0_PLLC[ENG]=0. The Software Boot Configuration Procedure is needed to engage the PLL and perform a chip reset. Signed-off-by: NStefan Roese <sr@denx.de>
-
由 Sergey Matyukevich 提交于
Add USB OHCI support for at91sam9g45ekes/at91sam9m10g45ek boards. Note that according to errata from Atmel, OHCI is not operational on the first revision of at91sam9g45 chip. So this patch enables OHCI support for later revisions. Signed-off-by: NSergey Matyukevich <geomatsi@gmail.com>
-
- 30 6月, 2010 1 次提交
-
-
由 Michael Weiss 提交于
This also uses the breadcrumb register as on MPC5200. Signed-off-by: NMichael Weiss <michael.weiss@ifm.com> Signed-off-by: NDetlev Zundel <dzu@denx.de>
-