Signed-off-by: NDetlev Zundel <dzu@denx.de>

cpu/mpc8260/cpu.c used to use do_fixup_by_path_u32() to update the
clock frequencies in the device tree, using a CPU path
"/cpus/OF_CPU", with OF_CPU beind defined in the board config file.

However, this does not work when one board config file (here:
MPC8260ADS.h) is intended to be used for several diffrent CPUs and
therefor contains a generic definition like "cpu@0", as the device
trees that will then be loaded will contain specific names like
"PowerPC,8272@0".

We switch to using do_fixup_by_prop_u32() instead, so we can search
for device_type="cpu", as it is done in other architectures, too.
Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Acked-by: NHeiko Schocher <hs@denx.de>
Tested-by: NHeiko Schocher <hs@denx.de>

AFEB9260 uses PA10, PA11 for ETX2 and ETX3.
Also, due to extarnal pull-up on IRQ line, Micrel PHY ID is 1 after reset sequence,
not 0.
Signed-off-by: NSergey Lapin <slapin@ossfans.org>

When the clock functions were changed to use cached values (and thereby
avoiding expensive math functions), early serial debug broke because the
baud programming is called before external memory is available.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

When dropping jump block support, the assumption was that all bootroms
supported entry point redirection via the EVT1 register.  Unfortunately,
this turned out to be incorrect for the oldest Blackfin parts (BF533-0.2
and older and BF561).  No one really noticed earlier because these parts
usually are booted by bypassing the bootrom entirely, and older BF533
parts are not supported at all (too many anomalies).
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Make sure we recurse through serial_putc() rather than bang on the UART
transmit register directly to avoid hardware overflows when using \n.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

lowlevel_init.S is not used any more so remove it.
As consequence, we also don't have to generate u-boot.lds
but can use a static version as before.

This also fixes the out-of-tree build problem introduced
with commit f0a2c7b4 "at91: add support for the PM9263 board"
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NWolfgang Denk <wd@denx.de>

Signed-off-by: NWolfgang Denk <wd@denx.de>

Signed-off-by: NDirk Behme <dirk.behme@googlemail.com>
Signed-off-by: NManikandan Pillai <mani.pillai@ti.com>

Signed-off-by: NDaniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Let CONFIG_SYS_HZ to have value of 1000 effectively fixing all users of
get_timer.

Changes since original version:
* Set PTV=2 (divisor 8) for boards using 12MHz timer clock source to
  improve timer resolution.
Signed-off-by: NLadislav Michl <ladis@linux-mips.org>

The function display_board_info() displays incorrect
silicon revision - based on the return value from
function get_cpu_rev().

This patch fixes the problem.
Signed-off-by: NSanjeev Premi <premi@ti.com>

The board-types defined in struct omap3_sysinfo seem to be
unused. The function display_board_info() is passed
board type as an argument; which is ignored.

This patch removes all uses of board-type, related definitions
and functions.
Signed-off-by: NSanjeev Premi <premi@ti.com>

Use the functions print_cpuinfo() and checkboard() to
display the cpu and board specific information.

These functions reuse content from the existing function
display_board_info() - which has been removed.

Also, updated the existig OMAP3 configurations to
define:
 - CONFIG_DISPLAY_CPUINFO
 - CONFIG_DISPLAY_BOARDINFO
Signed-off-by: NSanjeev Premi <premi@ti.com>

__asm__ follows gcc's documented syntax and is generally more common
than __asm.  This change is only asthetic and should not affect
functionality.
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>

__attribute__ follows gcc's documented syntax and is generally more
common than __attribute.  This change is only asthetic and should not
affect functionality.
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>

if using CONFIG_BOOTCOUNT_LIMIT feature on a MPC8360 CPU
in the muram-data node, the reg entry needs to be updated.
This is done in fdt_fixup_muram(), but we should use
the compatible "fsl,qe-muram-data" for searching the
node instead of searching the muram-data node with
an absolute path.
Signed-off-by: NHeiko Schocher <hs@denx.de>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

The timer has been rewrote with a precision at ~0,18%
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Tested-by: NSergey Lapin <slapin@ossfans.org>
Tested-by: NEric BENARD <ebenard@free.fr>

The PM9263 board is based on the AT91SAM9263-EK board.

Here is the page on Ronetix website:
http://www.ronetix.at/starter_kit_9263.htmlSigned-off-by: NIlko Iliev <iliev@ronetix.at>
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

calculate dynamically the clock rate and pllb setting for usb
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

This additional text in the bootup log helps to see if the board is
configured for NAND-booting. Especially helpful for boards that can
boot from NOR and NAND (e.g. most of the AMCC eval boards).
Signed-off-by: NStefan Roese <sr@denx.de>

There is no code change here, just new comments, but this keeps me from
having to do another audit from scratch in the future.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

DESCRIPTION:
The column address width settings for banks 2 and 3 are misconnected in
the SDRAM controller.  Accesses to bank 2 will result in an error if the
Column Address Width for bank 3 (EB3CAW ) is not set to be the same as
that of bank 2.

WORKAROUND:
If using bank 2, make sure that banks 2 and 3 have the same column address
width settings in the EBIU_SDBCTL register.  This must be the case
regardless of whether or not bank 3 is enabled.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NMike Frysinger <vapier@gentoo.org>

DESCRIPTION:
If the DF bit is set prior to a hardware reset, the PLL will continue to
divide CLKIN by 2 after the hardware reset, but the DF bit itself will be
cleared in the PLL_CTL register.

WORKAROUND:
Reprogram the PLL with DF cleared if the desire is to not divide CLKIN by
2 after reset.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

DESCRIPTION:
The Boot ROM is executed at power up/reset and changes the value of the
SICA_IWR registers from their default reset value of 0xFFFF, but does not
restore them.

WORKAROUND:
User code should not rely on the default value of these registers.  Set
the desired values explicitly.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

unify arm cache management except for non standard cache as ARM7TDMI
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

import system.h from linux
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

The previous code waited 1000us before checking i2c
status. Measurement shows i2c is usually ready in
under 50us. Change the polling interval to 15us,
loop 6,667 times to keep the polling timeout constant
at 100ms.

Fixes this compile error:
board.c: In function 'do_switch_ecc':
board.c:339: error: 'cmd_tbl_t' has no member named 'help'
make[1]: *** [board.o] Error 1
make[1]: Leaving directory `/db/psp_git/users/a0756819/u-boot/cpu/arm_cortexa8/omap3'
make: *** [cpu/arm_cortexa8/omap3/libomap3.a] Error 2

This is due to the fact that current command uses long
help for the usage print even if the CONFIG_SYS_LONGHELP
is not enabled. (Thanks Jean-Christophe for explanation).
Signed-off-by: NSanjeev Premi <premi@ti.com>

Move machine specific code to smdk6400.
Some board use OneNAND instead of NAND.

Some register MP0_CS_CFG[5:0] are controled by both h/w and s/w.
So it's better to use macro instead of hard-coded value.
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>

Signed-off-by: NScott Wood <scottwood@freescale.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Update the rm9200 reset sequence to try executing a board-specific reset
function and move specific board reset to board.
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

introduce serial_exit for this purpose. Use it only when the rm9200
serial driver is active
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

add CONFIG_AT91RM9200_USART to activate the driver
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

The AT91RM9200-EK Evaluation Board supports the AT91RM9200
ARM9-based 32-bit RISC microcontroller and enables real-time code development
and evaluation.

Here is the chip page on Atmel website:
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3507

with
	- NOR (cfi driver)
	- DataFlash
	- USB OHCI
	- Net
	- I2C (hard)
Signed-off-by: NUlf Samuelsson <ulf@atmel.com>
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>