remove asm code

Reset support
BSP autoconfig support

timer support
interrupt controller support
flash support
ethernet support
cache support
board information support
env support
booting image support

adding support for Xilinx ML401

timer support
interrupt controller support
flash support
ethernet support
cache support
board information support
env support
booting image support

adding support for Xilinx ML401

This patch updates the recently added Katmai board support. The biggest
change is the support of ECC DIMM modules in the 440SP(e) SPD DDR2
driver.

Please note, that still some problems are left with some memory
configurations. See the driver for more details.
Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NStefan Roese <sr@denx.de>

- fix logic error in image type handling
- make sure file system images (cramfs etc.) get stored in flash
  with image header stripped so they can be mounted through MTD

Since the relocation fix is not included yet and we're not sure how
it will be added, this patch removes code that required relocation
to be fixed for now.
Signed-off-by: NStefan Roese <sr@denx.de>

As suggested by Grant Likely this patch enables the Xilinx SystemACE
driver to select 8 or 16bit mode upon startup.
Signed-off-by: NStefan Roese <sr@denx.de>

Some CPUs like PPC, BLACKFIN need sync() to ensure cfi flash write command
is fully finished. The sync() is defined in each CPU's io.h file. For
those CPUs which do not need sync for now, a dummy sync() is defined in
their io.h as well.
Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com>

Signed-off-by: NStefan Roese <sr@denx.de>

This patch enables the "new" get_dev() function for block devices
introduced by Grant Likely to be used on systems that still suffer
from the relocation problems (manual relocation neede because of
problems with linker script).

Hopefully we can resolve this relocation issue soon for all platform
so we don't need this additional code anymore.
Signed-off-by: NStefan Roese <sr@denx.de>

This patch removes some problems when the Xilinx SystemACE driver
is used with 16bit access on an big endian platform (like the
AMCC Katmai).
Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NStefan Roese <sr@denx.de>

This patch switches to the desired I2C bus when the date/dtt
commands are called. This can be configured using the
CFG_RTC_BUS_NUM and/or CFG_DTT_BUS_NUM defines.
Signed-off-by: NStefan Roese <sr@denx.de>

This patch adds support for the DDR2 controller used on the
440SP and 440SPe. It is tested on the Katmai (440SPe) eval
board and works fine with the following DIMM modules:

- Corsair CM2X512-5400C4 (512MByte per DIMM)
- Kingston ValueRAM KVR667D2N5/512 (512MByte per DIMM)
- Kingston ValueRAM KVR667D2N5K2/2G (1GByte per DIMM)

This patch also adds the nice functionality to dynamically
create the TLB entries for the SDRAM (tlb.c). So we should
never run into such problems with wrong (too short) TLB
initialization again on these platforms.
Signed-off-by: NStefan Roese <sr@denx.de>

Since the existing 4xx SPD SDRAM initialization routines for the
405 SDRAM controller and the 440 DDR controller don't have much in
common this patch splits both drivers into different files.

This is in preparation for the 440 DDR2 controller support (440SP/e).
Signed-off-by: NStefan Roese <sr@denx.de>