Misspelling of SPDX-License-Identifier is rather fatal than other
general typos, so must be fixed.

This file spells SPDX-Licence-Identifier.
                           ^

I also moved it to the very top of the file with // comment style.

Detected by grepping the source tree:

$ git grep --not -e SPDX-License-Identifier --and -e SPDX-
board/armltd/vexpress64/pcie.c: * SPDX-Licence-Identifier:      GPL-2.0+
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: NLiviu Dudau <liviu.dudau@foss.arm.com>

Extra "not DM" controllers support is disabled.
u-boot BSP still good enough to upgrade and run images.
Signed-off-by: NOleksandr Zhadan <oleks@arcturusnetworks.com>
Signed-off-by: NMichael Durrant <mdurrant@arcturusnetworks.com>

Remove square brackets around label in state command description.

Fixes: ea41b156 ("cmd/led: check subcommand "list" instead "l"")
Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Previously we would store NULL in info->padding and jump to an illegal
instruction if an unknown value for "padding" was specified in the
device tree.
Signed-off-by: NPatrick Doyle <pdoyle@irobot.com>

- Assorted minor fixes

Signed-off-by: NShannon Barber <sbarber@dataspeedinc.com>

If flash_write fails, whilst we propagate this up to our caller, we need
to avoid swapping in the new file (if we're on a filesystem) in this
case.

Fixes: dbc34323 ("tools: env: Implement atomic replace for filesystem")
Signed-off-by: NAlex Kiernan <alex.kiernan@gmail.com>

Commit ad7061ed ("doc: Move device tree bindings documentation to
 doc/device-tree-bindings") moved all device tree binding documentation
to doc/device-tree-bindings directory.

The current U-Boot project still have two documentation directories:

- doc/
- Documentation/

Move all documentation and sphinx files to doc directory so all content
can be in a common place.
Signed-off-by: NBreno Lima <breno.lima@nxp.com>

The driver was using milliseconds and programming it into a register
which takes ticks of the watchdog clock, which runs at 1MHz. This meant
we were off by 1000 with the desired value.

When 06985289 ("watchdog: Implement generic watchdog_reset()
version") was added the aspeed board would leave the watchdog running,
causing it to bite before u-boot was done.

Discovered by booting in qemu:

  $ qemu-system-arm -M ast2500-evb -drive file=test.img,format=raw,if=mtd -nographic -no-reboot -d cpu_reset

  U-Boot 2019.07-rc3-00091-g2253e40c (Jun 06 2019 - 16:53:23 +0930)

  Model: Aspeed BMC
  DRAM:  496 MiB
  WDT:   Started with servicing (60s timeout)
  MMC:
  In:    serial@1e784000
  Out:   serial@1e784000
  Err:   serial@1e784000
  Watchdog timer expired.

Fixes: 06985289 ("watchdog: Implement generic watchdog_reset() version")
Signed-off-by: NJoel Stanley <joel@jms.id.au>

Fixes: 8163faf9 ARMv8: add optional Linux kernel image header
Signed-off-by: NMian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Tested-by: NAndreas Färber <afaerber@suse.de>

Update all git repo links with the new gitlab ones.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Acked-by: NWolfgang Denk <wd@denx.de>

Add myself as an SH maintainer.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Tom Rini <trini@konsulko.com>

- PCIe driver change to support DM model
- T2080QDS migrated to use PCIe DM model

- Update STM32MP entry in MAINTAINERS
- Handle correctly binding for g-tx-fifo-size for USB DWC2 driver
- Fix trusted STM32MP1 defconfig with correct ethernet driver

- Avoid HS400 mode when accessing boot partitions

Enable the DM PCIe driver in T2080QDS defconfig.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Add PCIe DM driver for Freescale PowerPC PCIe controllers.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

T2080 integrated 4 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 3.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Compile the legacy PCIe initialization reoutines only when DM_PCI
is not enabled.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Compile the routines of mpc85xx/pci.c when both FSL_PCI_INIT
and DM_PCI are not enabled.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Use the Kconfig option to select the PCIe reset errata.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Use the Kconfig option to select the PCIe ASPM errata.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

- LS1046AFRWY support
- USB errata fix and secure boot defconfig support for LS1028A
- Enabled SDHC and SATA for LX2160
- LS1046A serdes fixes
- other minor fixes

Allow device mode in DWC2 driver when device tree select the dr_mode
"peripheral" or "otg".

The device mode is not allowed when dr_mode = "host" in device tree.
Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: NMarek Vasut <marex@denx.de>

Remove the override for usbotg_hs on g-tx-fifo-size as the correct
binding, used in the kernel device tree, is now supported in dwc2
device driver.
Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>

Manage g-tx-fifo-size as a array as specify in the binding.
Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: NMarek Vasut <marex@denx.de>

Uboot prompt must not be available while running
secure boot. TO ensure this  bootdelay must be set
to -2.
Signed-off-by: NUdit Agarwal <udit.agarwal@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

LS1046AFRWY board supports LS1046A family SoCs. This patch
add base support for this board.
Board support's 4GB ddr memory, i2c, micro-click module,microSD card,
serial console,qspi nor flash,ifc nand flash,qsgmii network interface,
usb 3.0 and serdes interface to support two x1gen3 pcie interface.
Signed-off-by: NCamelia Groza <camelia.groza@nxp.com>
Signed-off-by: NMadalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: NPankit Garg <pankit.garg@nxp.com>
Signed-off-by: NPramod Kumar <pramod.kumar_1@nxp.com>
Signed-off-by: NRajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: NVabhav Sharma <vabhav.sharma@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

During SD boot, MC firmware and DPC are copied from SD card to DDR.
Size reserved between MC and DPC firmware on DDR is 1MB.
If the size of MC firmware(load address 0x80000000) is more than 1 MB
then part of MC firmware will be overwritten by DPC firmware (load
address 0x80100000).

Fix: Update the MC/DPL/DPC firmware's DDR address as per their
respective addresses in SD card.
Signed-off-by: NWasim Khan <wasim.khan@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

During SD boot, MC firmware and DPC are copied from SD card to DDR.
Size reserved between MC and DPC firmware on DDR is 1MB.
If the size of MC firmware(load address 0x80000000) is more than 1 MB
then part of MC firmware will be overwritten by DPC firmware (load
address 0x80100000).

Fix: Update the MC/DPL/DPC firmware's DDR address as per their
respective addresses in SD card.
Signed-off-by: NWasim Khan <wasim.khan@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Add bootcmd for IFC NOR boot and SD boot.
Signed-off-by: NWasim Khan <wasim.khan@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

LS1028A includes an integrated PCI bus with 11 PCI functions residing on
bus 0.  ECAM plus the device register space takes up 256MB of address
space.
Signed-off-by: NAlex Marginean <alexm.osslist@gmail.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Layerscape began to use two eSDHC controllers, for example,
LS1012A. They are same IP block with same reference clock.
This patch is to add clock support for the second eSDHC.
Signed-off-by: NYinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

With this setting enabled, the on-board QSPI cannot be
properly flashed. There are no error messages, but the simple
write / read / compare tests fail.

This is already disabled in the qspi and tfa defconfigs for the
LS1046ARDB platform.
Signed-off-by: NMaciej Pijanowski <maciej.pijanowski@3mdeb.com>
Cc: piotr.krol@3mdeb.com
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Signed-off-by: NMaciej Pijanowski <maciej.pijanowski@3mdeb.com>
Cc: piotr.krol@3mdeb.com
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

As per LS1046A hardware manual, SGMII.9 and SGMII.10 present on
lane D and lane C respectively for 0x3363 protocol.

So fix serdes1 settings for ls1046a.
Signed-off-by: NMaciej Pijanowski <maciej.pijanowski@3mdeb.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Fixes a link error on layerscape platform, linking fails with CONFIG_PCI
set and CONFIG_PCI_LAYERSCAPE unset.
Signed-off-by: NAlex Marginean <alexm.osslist@gmail.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Change bootcmd update logic when CONFIG_ENV_ADDR is not defined
Signed-off-by: NPankit Garg <pankit.garg@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>