- 22 1月, 2009 1 次提交
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由 Wolfgang Denk 提交于
Signed-off-by: NWolfgang Denk <wd@denx.de>
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- 19 1月, 2009 3 次提交
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由 Wolfgang Denk 提交于
Update CHANGELOG Signed-off-by: NWolfgang Denk <wd@denx.de>
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由 Wolfgang Denk 提交于
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由 Mike Frysinger 提交于
The x86 based version of Darwin behaves the same quirky way as the powerpc Darwin, so only check HOSTOS when setting up Darwin workarounds. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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- 18 1月, 2009 1 次提交
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由 Peter Korsgaard 提交于
The code in fdt_resize() to extend the fdt size to end on a page boundary is wrong for fdt's not located at an address aligned on a page boundary. What's even worse, the code would make actualsize shrink rather than grow if (blob & 0xfff) was bigger than the amount of padding added by ALIGN(), causing fdt_add_mem_rsv to fail. Fix it by aligning end address (blob + size) to a page boundary instead. For aligned fdt's this is equivalent to what we had before. Signed-off-by: NPeter Korsgaard <jacmet@sunsite.dk>
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- 16 1月, 2009 11 次提交
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由 Mike Frysinger 提交于
The recvfrom() function takes a socklen_t, not an int. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Nobuhiro Iwamatsu 提交于
lowlevel_init of SH was corrected to use the write/readXX macro. However, there was a problem that was not able to be compiled partially. This patch corrected this. Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Kieran Bingham 提交于
Fix up rsk7203 target to build successfully using out-of-tree build. Signed-off-by: NKieran Bingham <kbingham@mpc-data.co.uk> Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
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- 15 1月, 2009 2 次提交
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由 Wolfgang Denk 提交于
Update CHANGELOG. Signed-off-by: NWolfgang Denk <wd@denx.de>
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由 Wolfgang Denk 提交于
Parallel builds would occasionally issue this build warning: ln: creating symbolic link `cpu/mpc824x/bedbug_603e.c': File exists Use "ln -sf" as quick work around for the issue. Signed-off-by: NWolfgang Denk <wd@denx.de>
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- 14 1月, 2009 13 次提交
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由 Matthias Fuchs 提交于
This patch adds esd's loadpci BSP command to CPCI4052 and CPCI405AB board. This requires CONFIG_CMD_BSP and CONFIG_PRAM. Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Matthias Fuchs 提交于
Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Matthias Fuchs 提交于
This patch cleans up CPCI405 board support: - wrap long lines - unification of spaces in function calls - remove dead code Use correct io accessors on peripherals. Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Matthias Fuchs 提交于
This patch turns on the auto RS485 mode in the 2nd external uart on PLU405 boards. This is a special mode of the used Exar XR16C2850 uart. Because these boards only have a 485 physical layer connected it's a good idea to turn it on by default. Signed-off-by: NMatthias Fuchs <mf@esd.eu> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Wolfgang Denk 提交于
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由 Haiying Wang 提交于
- Move the TLB entry of PIXIS_BASE from TLB0 to TLB1[8], because in CAMP mode, all the TLB0 entries will be invalidated after cpu1 brings up kernel, thus cpu0 can not access PIXIS_BASE anymore (any access will cause DataTLBError exception) - Set CONFIG_SYS_DDR_TLB_START to 9 for MPC8572DS board. Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com>
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由 Haiying Wang 提交于
So that we can locate the DDR tlb start entry to the value other than 8. By default, it is still 8. Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com>
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由 Roy Zang 提交于
The IO port selection for MPC8544DS board: Port cfg_io_ports PCIE1 0x2, 0x3, 0x4, 0x5, 0x6, 0x7 PCIE2 0x4, 0x5, 0x6, 0x7 PCIE3 0x6, 0x7 This patch changes the PCIE12 and PCIE2 logic more readable. Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>
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由 Roy Zang 提交于
PCIE2 and PCIE3 should be decided by corresponing bit in devdisr instead of PCIE1 bit. On MPC8572DS board, PCIE refers to PCIE1. Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>
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由 Roy Zang 提交于
The IO port selection is not correct on MPC8572DS and MPC8544DS board. This patch fixes this issue. For MPC8572 Port cfg_io_ports PCIE1 0x2, 0x3, 0x7, 0xb, 0xc, 0xf PCIE2 0x3, 0x7 PCIE3 0x7 For MPC8544 Port cfg_io_ports PCIE1 0x2, 0x3, 0x4, 0x5, 0x6, 0x7 PCIE2 0x4, 0x5, 0x6, 0x7 PCIE3 0x6, 0x7 Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>
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由 Becky Bruce 提交于
Rename _BASE to _BUS, as it's actually a PCI bus address, separate virtual and physical addresses into _VIRT and _PHYS, and use each appopriately. This makes the code easier to read and understand, and facilitates mapping changes going forward. Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org>
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由 Becky Bruce 提交于
Rename _BASE to _BUS, as it's actually a PCI bus address, separate virtual and physical addresses into _VIRT and _PHYS, and use each appopriately. This makes the code easier to read and understand, and facilitates mapping changes going forward. Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org>
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- 12 1月, 2009 1 次提交
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由 Wolfgang Denk 提交于
Signed-off-by: NWolfgang Denk <wd@denx.de>
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- 11 1月, 2009 1 次提交
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- 07 1月, 2009 7 次提交
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由 Mike Frysinger 提交于
The board_nand_init() function should return an int, not void. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
The eeprom SPI init functions are duplicated as the common code already executes these for us. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Many of the Blackfin board linker scripts are preprocessed, so make sure we output the linker script into the build tree rather than the source tree. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Make sure all .text sections get pulled in and the entry point is properly referenced so they don't get discarded when linking with --gc-sections. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
In order to boot an LDR out of parallel flash, the ldr utility needs a few flags to tell it to generate the right header. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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