- 17 5月, 2021 4 次提交
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由 Bin Meng 提交于
At present U-Boot SPL fails to boot on SiFive Unleashed board, due to a load address misaligned exception happens when loading the FIT image in spl_load_simple_fit(). The exception happens in memmove() which is called by fdt_splice_(). Commit 8f0dc4cf introduces an assembly version of memmove but it does take misalignment into account (it checks if length is a multiple of machine word size but pointers need also be aligned). As a result it will generate misaligned load/store for the majority of cases and causes significant performance regression on hardware that traps misaligned load/store and emulate them using firmware. The current behaviour of memcpy is that it checks if both src and dest pointers are co-aligned (aka congruent modular SZ_REG). If aligned, it will copy data word-by-word after first aligning pointers to word boundary. If src and dst are not co-aligned, however, byte-wise copy will be performed. This patch was taken from the Linux kernel patch [1], which has not been applied at the time being. It fixes the memmove and optimises memcpy for misaligned cases. It will first align destination pointer to word-boundary regardless whether src and dest are co-aligned or not. If they indeed are, then wordwise copy is performed. If they are not co-aligned, then it will load two adjacent words from src and use shifts to assemble a full machine word. Some additional assembly level micro-optimisation is also performed to ensure more instructions can be compressed (e.g. prefer a0 to t6). With this patch, U-Boot boots again on SiFive Unleashed board. [1] https://patchwork.kernel.org/project/linux-riscv/patch/20210216225555.4976-1-gary@garyguo.net/ Fixes: 8f0dc4cf ("riscv: assembler versions of memcpy, memmove, memset") Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
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由 Sean Anderson 提交于
If /chosen was missing, chosen_offset would never get updated with the new /chosen node. This would cause fdt_setprop_u32 to fail. This patch fixes this by setting chosen_offset. In addition, log any errors from setting boot-hartid as well. Fixes: 5370478d ("riscv: Add boot hartid to device tree") Signed-off-by: NSean Anderson <seanga2@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NRick Chen <rick@andestech.com> Reviewed-by: NAtish Patra <atish.patra@wdc.com>
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由 Bin Meng 提交于
At present there is only one Kconfig option CONFIG_SIFIVE_CLINT to control the enabling of SiFive CLINT support in both SPL (M-mode) and U-Boot proper (S-mode). So for a typical SPL config that the SiFive CLINT driver is enabled in both SPL and U-Boot proper, that means the S-mode U-Boot tries to access the memory-mapped CLINT registers directly, instead of the normal 'rdtime' instruction. This was not a problem before, as the hardware does not forbid the access from S-mode. However this becomes an issue now with OpenSBI commit 8b569803475e ("lib: utils/sys: Add CLINT memregion in the root domain") that the SiFive CLINT register space is protected by PMP for M-mode access only. U-Boot proper does not boot any more with the latest OpenSBI, that access exceptions are fired forever from U-Boot when trying to read the timer value via the SiFive CLINT driver in U-Boot. To solve this, we need to split current SiFive CLINT support between SPL and U-Boot proper, using 2 separate Kconfig options. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSean Anderson <seanga2@gmail.com>
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由 Bin Meng 提交于
This fixes two minor format issues of the ax25-ae350 reST file. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NRick Chen <rick@andestech.com>
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- 15 5月, 2021 4 次提交
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由 Tom Rini 提交于
Rsync all defconfig files using moveconfig.py Signed-off-by: NTom Rini <trini@konsulko.com>
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https://source.denx.de/u-boot/custodians/u-boot-amlogic由 Tom Rini 提交于
- dts: add missing -u-boot.dtsi to enable HDMI on Beelink GTKing/King-Pro - usb: dwc3-meson-g12a: skip phy on -ENODATA aswell - net: dwmac_meson8b: do not set TX delay in TXID & RXID - net: designware: meson8b: add g12a compatible
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- 14 5月, 2021 28 次提交
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由 Neil Armstrong 提交于
Add support for the Meson G12A dwmac glue compatible needed after Linux 5.12 sync. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
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由 Neil Armstrong 提交于
When the PHY interface is set as TXID & RXID, the delays should be taken from DT, but first they should not be hardcoded since the PHY driver will set them. Fixes: 798424e8 ("net: designware: add Amlogic Meson8b & later glue driver") Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Reviewed-by: NRamon Fried <rfried.dev@gmail.com>
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由 Neil Armstrong 提交于
If the PHY isn't specified in the DT, -ENODATA means it should be skipped, handle it like -ENOENT. With that, devices without USB3 supported can have USB working (Odroid-HC4). Fixes: adb049ab ("usb: dwc3: Add Meson G12A USB Glue") Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
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由 Neil Armstrong 提交于
This lacks the right u-boot specific DT include to make HDMI work. Reported-by: NB1oHazard <ty3uk@mail.ua> Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
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由 Bin Meng 提交于
This reverts commit bc8bbb77. This commit breaks U-Boot booting on SiFive Unleashed board, as there is no such CSR on U54 core. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NLeo Yu-Chi Liang <ycliang@andestech.com>
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由 Vincent Chen 提交于
The pwm_sifive_set_config() and pwm_sifive_set_enable() cannot work properly due to the wrong implementations. It will cause the u-boot PWM command to not work as expected. The bugs will be resolved in this patch. Signed-off-by: NVincent Chen <vincent.chen@sifive.com> Reviewed-by: NRick Chen <rick@andestech.com>
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由 Sean Anderson 提交于
It is no longer necessary to disallow ai ram, since it is enabled by the sram driver. Signed-off-by: NSean Anderson <seanga2@gmail.com>
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由 Sean Anderson 提交于
Testing showed that disabling AI while leaving PLL1 enabled disabled the aisram. This suggests that AI is a more appropriate clock for that ram bank. Signed-off-by: NSean Anderson <seanga2@gmail.com>
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由 Sean Anderson 提交于
This is more consistent with the naming of other ram banks, and matches what Linux is doing. Reported-by: NDamien Le Moal <Damien.LeMoal@wdc.com> Signed-off-by: NSean Anderson <seanga2@gmail.com>
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由 Sean Anderson 提交于
We just need to initialize all the clocks pre-reloc. The clock driver creates a bunch of devices, so we need to increase the pre-reloc malloc arena. Signed-off-by: NSean Anderson <seanga2@gmail.com>
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由 Sean Anderson 提交于
These devices are necessary for the clock driver, which is required by the sram driver, to run pre-relocation. Signed-off-by: NSean Anderson <seanga2@gmail.com>
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由 Sean Anderson 提交于
Variables which had previously been stored in .bss are moved to .data. In addition, probed needs to be reset when the clock driver is re-bound post-relocation. Signed-off-by: NSean Anderson <seanga2@gmail.com>
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由 Sean Anderson 提交于
No other (real) clocks have the cpu clock as their parent; instead they are children of aclk. Move the clint clock under aclk to match them. Signed-off-by: NSean Anderson <seanga2@gmail.com>
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由 Sean Anderson 提交于
This simplifies the PLL creation process, since we don't have to pass all the parameters individually. Signed-off-by: NSean Anderson <seanga2@gmail.com>
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由 Sean Anderson 提交于
This conditional always evaluated as false, regardless of the value of reg. Fix it so that it properly tests the bits in the PLL register. Also test PLL_EN, now that we set it. Reported-by: NDamien Le Moal <Damien.LeMoal@wdc.com> Signed-off-by: NSean Anderson <seanga2@gmail.com>
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由 Sean Anderson 提交于
After starting or setting the rate of a PLL, the enable bit must be set. This fixes a bug where the AI ram would not be accessible, because it requires PLL1 to be running. Signed-off-by: NSean Anderson <seanga2@gmail.com> Reviewed-by: NDamien Le Moal <damien.lemoal@wdc.com>
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由 Sean Anderson 提交于
If the user/dev explicitly requests a clock be assigned a certain rate, then we should warn them if we can't do it. This makes it clear if the clock is running at the default rate. Signed-off-by: NSean Anderson <seanga2@gmail.com>
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由 Rick Chen 提交于
Add Leo as co-maintainer for RISC-V. Signed-off-by: NRick Chen <rick@andestech.com>
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由 Tom Rini 提交于
- Improve support for various forms of extension boards and add DT overlay application support.
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由 Kory Maincent 提交于
Update the Kconfig and the board file to make the am335x board compatible with cape detection. Signed-off-by: NKory Maincent <kory.maincent@bootlin.com>
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由 Kory Maincent 提交于
The am335x from BeagleBone use i2c EEPROM to detect capes. The memory is wired to i2c bus 2 therefore it need to be enabled. Add i2c2 clock, pinmux description and pinmux enable function. Signed-off-by: NKory Maincent <kory.maincent@bootlin.com>
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由 Kory Maincent 提交于
This commit enables using the extension board detection mechanism on CHIP boards Signed-off-by: NKory Maincent <kory.maincent@bootlin.com> Acked-by: NMaxime Ripard <maxime@cerno.tech> Acked-by: NAndre Przywara <andre.przywara@arm.com>
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由 Kory Maincent 提交于
Add the extension_board_scan specific function to scan the information of the EEPROM on one-wire and fill the extension struct. Add the Kconfig symbol to enable the needs to detect DIPs. Signed-off-by: NKory Maincent <kory.maincent@bootlin.com> Reviewed-by: NMaxime Ripard <maxime@cerno.tech> Acked-by: NAndre Przywara <andre.przywara@arm.com>
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由 Kory Maincent 提交于
This patch changes the functioning of the detection of w1 devices. The old way was a comparison between detected w1 and the ones described in the device tree. Now it will just look for the driver matching the family id of the w1 detected. The patch is inspired from Maxime Ripard code. Signed-off-by: NKory Maincent <kory.maincent@bootlin.com> Reviewed-by: NMaxime Ripard <maxime@cerno.tech>
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由 Kory Maincent 提交于
This commit enables using the extension board detection mechanism on AM57xx based platforms. Signed-off-by: NKory Maincent <kory.maincent@bootlin.com>
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由 Kory Maincent 提交于
The BeagleBone platforms all use a common mechanism to discover and identify extension boards (called "capes"): each extension board has an I2C-connected EEPROM describing itself. This patch implements a generic extension_scan_board() feature that can be used by all BeagleBone platforms to read those I2C EEPROMs and fill in the list of "extension" structures. Following commits will enable this common logic on two BeagleBone platforms. Signed-off-by: NKory Maincent <kory.maincent@bootlin.com>
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由 Kory Maincent 提交于
This commit extends the sandbox to implement a dummy extension_board_scan() function and enables the extension command in the sandbox configuration. It then adds a test that checks the proper functionality of the extension command by applying two Device Tree overlays to the sandbox Device Tree. Signed-off-by: NKory Maincent <kory.maincent@bootlin.com> [trini: Limit to running on sandbox] Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Kory Maincent 提交于
This patch adds a new "extension" command, which aims at detecting extension boards connected to the hardware platform, and apply the Device Tree overlays that describe the hardware present on those extension boards. In order to enable this mechanism, board-specific code must implement the extension_board_scan() function that fills in a linked list of "struct extension", each describing one extension board. In addition, the board-specific code must select the SUPPORT_EXTENSION_SCAN Kconfig boolean. Based on this: - "extension scan" makes the generic code call the board-specific extension_board_scan() function to retrieve the list of detected extension boards. - "extension list" allows to list the detected extension boards. - "extension apply <number>|all" allows to apply the Device Tree overlay(s) corresponding to one, or all, extension boards The latter requires two environment variables to exist and set one variable to run: - extension_overlay_addr: the RAM address where to load the Device Tree overlays - extension_overlay_cmd: the U-Boot command to load one overlay. Indeed, the location and mechanism to load DT overlays is very setup specific. - extension_overlay_name: set by the command: the name of the DT which will be load during the execution. When calling the command described in the extension_overlay_cmd variable, the variable extension_overlay_name will be defined. So a typical extension_overlay_cmd will look like this: extension_overlay_cmd=load mmc 0:1 $extension_overlay_addr /boot/$extension_overlay_name Here is an example on how to use it: => run loadfdt => fdt addr $fdtaddr => setenv extension_overlay_addr 0x1000 => setenv extension_overlay_cmd 'load mmc 0:1 ${extension_overlay_addr} /boot/${extension_overlay_name}' => extension scan Found 1 extension board(s). => extension apply 0 519 bytes read in 3 ms (168.9 KiB/s) Signed-off-by: NKory Maincent <kory.maincent@bootlin.com> Reviewed-by: NMaxime Ripard <maxime@cerno.tech>
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- 13 5月, 2021 3 次提交
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由 Kory Maincent 提交于
Move the fdt_valid function to fdt_support. This changes allow to be able to test the validity of a devicetree in other c files. Update code syntax. Signed-off-by: NKory Maincent <kory.maincent@bootlin.com> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NMaxime Ripard <maxime@cerno.tech>
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由 Marek Vasut 提交于
Scrub duplicate /memory@* node entries here. Some R-Car DTs might contain multiple /memory@* nodes, however fdt_fixup_memory_banks() either generates single /memory node or updates the first /memory node. Any remaining memory nodes are thus potential duplicates. However, it is not possible to delete all the memory nodes right away, since some of those might not be DRAM memory nodes, but some sort of other memory. Thus, delete only the memory nodes which are in the R-Car3 DBSC ranges. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
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由 Marek Vasut 提交于
The rcar-common/common.c contains various common board functions shared by all R-Car and RZG boards. This board is not compiling the file in, so add it. This way, part of the board code can be de-duplicated too. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Adam Ford <aford173@gmail.com>
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- 12 5月, 2021 1 次提交
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https://source.denx.de/u-boot/custodians/u-boot-ti由 Tom Rini 提交于
- Initial support for AM64 EVM and SK - K3 DDR driver unification for J7 and AM64 platforms. - Minor fixes for TI clock driver
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