- 05 9月, 2019 1 次提交
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由 Andy Yan 提交于
When look through the code, I found this bare metal drives is not used, so remove it. Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 04 9月, 2019 4 次提交
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https://gitlab.denx.de/u-boot/custodians/u-boot-arc由 Tom Rini 提交于
These are some very late changes mostly required to get 64-bit division working on ARC boards. For that we had to import missing parts of libgcc and add compiler flags to EMSDP which otherwise used very simple profile for compliation. And while at it another fix for EM SDP initialization is inluded as well.
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由 Alexey Brodkin 提交于
Even though EM SDP is FPGA-based board and different FPGA images (known as .bit-files) are awailable for the board still there's a common subset of options we may rely on for all configs. These are: * Normalizer * Swap instructions * Simple multiplier * Barrel-shifter * Floating-point unit * Shorter instructions (code density) This among other improvements allows to compile code with 64-bit divisions, see [1]. [1] https://patchwork.ozlabs.org/patch/1156541/Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Cc: Kever Yang <kever.yang@rock-chips.com>
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由 Alexey Brodkin 提交于
As reported by Kever here [1] we were unable to compile 64-bit division code due to missing definition of __udivdi3(). Import its implementation and __udivmoddi4() as its direct dependency from today's libgcc [2]. [1] https://patchwork.ozlabs.org/patch/1146845/ [2] https://github.com/gcc-mirror/gcc/commit/5d8723600bc0eed41226b5a6785bc02a053b45d5Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Cc: Kever Yang <kever.yang@rock-chips.com>
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由 Alexey Brodkin 提交于
If the "Page Mode" is not enabled on the device, read operations from PSRAM may result in incorrect data. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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- 03 9月, 2019 16 次提交
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https://gitlab.denx.de/u-boot/custodians/u-boot-i2c由 Tom Rini 提交于
i2c bugfixes for 2019.10 take 2 - i2c: mxc: add CONFIG_CLK support If CONFIG_CLK is enabled use clk framework for clock settings.
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https://gitlab.denx.de/u-boot/custodians/u-boot-riscv由 Tom Rini 提交于
- Skip unavailable hart in the get_count(). - fu540 set serial env from otp. - fu540 add mmc0 as a boot target device. - Update fix_rela_dyn and add absolute reloc addend. - Andestech PLIC driver will skip unavailable hart. - Support Andestech V5L2 cache driver.
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由 Rick Chen 提交于
Use CCTL command to do d-cache write back and invalidate instead of fence. Signed-off-by: NRick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Rick Chen 提交于
When L2 node exists inside cpus node, uclass_get_device can not parse L2 node successfully. So move it outside from cpus node. Also add tag-ram-ctl and data-ram-ctl attributes for v5l2 cache controller driver. This can adjust timing by requirement from dtb to improve performance. Signed-off-by: NRick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Rick Chen 提交于
Flush and disable L2 cache in dcache_disable() which will be called in cleanup_before_linux() before jump to linux. The sequence will be preferred as below: L1 flush -> L1 disable -> L2 flush -> L2 disable Signed-off-by: NRick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Rick Chen 提交于
Select the v5l2 UCLASS_CACHE driver for ax25. Signed-off-by: NRick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Rick Chen 提交于
Find the UCLASS_CACHE driver to configure the cache controller's settings. Signed-off-by: NRick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Rick Chen 提交于
Add a v5l2 cache controller driver that is usually found on Andes RISC-V ae350 platform. It will parse the cache settings from the dtb. In this version tag and data ram control timing can be adjusted by the requirement from the dtb. Signed-off-by: NRick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Rick Chen 提交于
Add cache enable and disable ops for test coverage. Signed-off-by: NRick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Rick Chen 提交于
Add cache enable/disable ops to the DM cache uclass driver Signed-off-by: NRick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Rick Chen 提交于
Initialize plic driver by ofnode_for_each_subnode() instead of cpu_get_count(). This way can support to skip some harts which maybe marked as unavailable, but the cpu node exists indeed. Signed-off-by: NRick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Marcus Comstedt 提交于
The addend is now added for RELOC_TYPE relocs. Also, changed the loop structure so that all the R_RISCV_RELATIVE relocs are not required to be at the beginning of the list. Signed-off-by: NMarcus Comstedt <marcus@mc.pp.se> Cc: Rick Chen <rick@andestech.com>
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由 Marcus Comstedt 提交于
Previously the handling of R_RISCV_32 and R_RISCV_64 would simply insert the value of the symbol and ignore any addend. However, there exist relocs where the addend is non-zero: 0000000080250900 R_RISCV_64 efi_runtime_services+0x0000000000000068 0000000080250910 R_RISCV_64 efi_runtime_services+0x0000000000000038 0000000080250920 R_RISCV_64 efi_runtime_services+0x0000000000000018 0000000080250930 R_RISCV_64 efi_runtime_services+0x0000000000000020 0000000080250980 R_RISCV_64 efi_runtime_services+0x0000000000000048 0000000080250990 R_RISCV_64 efi_runtime_services+0x0000000000000050 00000000802509a0 R_RISCV_64 efi_runtime_services+0x0000000000000058 0000000080250940 R_RISCV_64 systab+0x0000000000000030 0000000080250950 R_RISCV_64 systab+0x0000000000000040 0000000080250960 R_RISCV_64 systab+0x0000000000000050 0000000080250970 R_RISCV_64 systab+0x0000000000000060 In these cases the addend needs to be added to the symbol value to get the correct value for the reloc. Signed-off-by: NMarcus Comstedt <marcus@mc.pp.se> Cc: Rick Chen <rick@andestech.com>
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由 Alistair Francis 提交于
Add the mmc0 device as a BOOT_TARGET_DEVICES. Signed-off-by: NAlistair Francis <alistair.francis@wdc.com> Reviewed-by: NLukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Sagar Shrikant Kadam 提交于
This patch sets the serial# environment variable by reading the board serial number from the OTP memory region. Signed-off-by: NSagar Shrikant Kadam <sagar.kadam@sifive.com> Reviewed-by: NAnup Patel <anup@brainfault.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Tested-by: NBin Meng <bmeng.cn@gmail.com>
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由 Bin Meng 提交于
We should not count in hart that is marked as not available in the device tree in riscv_cpu_get_count(). Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NRick Chen <rick@andestech.com> Reviewed-by: NLukas Auer <lukas.auer@aisec.fraunhofer.de>
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- 02 9月, 2019 2 次提交
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由 Peng Fan 提交于
When CONFIG_CLK enabled, use CLK UCLASS for clk related settings. Signed-off-by: NPeng Fan <peng.fan@nxp.com> Reviewed-by: NFrieder Schrempf <frieder.schrempf@kontron.de> Tested-by: NFrieder Schrempf <frieder.schrempf@kontron.de> hs: removed hunk in mxc_i2c_probe() as not longer in code
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- 01 9月, 2019 1 次提交
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由 Tom Rini 提交于
- Assorted bug fixes
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- 31 8月, 2019 9 次提交
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由 Rasmus Villemoes 提交于
I wanted this to be compatible with mkenvimage, including the ability to embed newlines in variables by escaping them. But I failed to check that it works more than once. Fixes: f3d8f7dd (Allow providing default environment from file) Signed-off-by: NRasmus Villemoes <rasmus.villemoes@prevas.dk>
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由 Ryan Harkin 提交于
This reverts commit fc04b923 where the FVP DRAM configuration was added. Signed-off-by: NRyan Harkin <ryan.harkin@linaro.org> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NSudeep Holla <sudeep.holla@arm.com>
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由 Heinrich Schuchardt 提交于
char num[1]; sprintf(num, "%d", i); leads to a buffer overrun. Simplify the overly complex coding. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Acked-by: NHeiko Schocher <hs@denx.de>
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由 Suniel Mahesh 提交于
Enable CONFIG_DM_USB to remove compile warning for am43xx based targets: ===================== WARNING ====================== This board does not use CONFIG_DM_USB. Please update the board to use CONFIG_DM_USB before the v2019.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/MIGRATION.txt for more info. ==================================================== Signed-off-by: NSuniel Mahesh <sunil.m@techveda.org>
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由 Suniel Mahesh 提交于
TI AM65x platforms (evm and HS) generate an SPL image 'tispl.bin*' and there is no rule for cleanup. Added entry for cleanup in clean target. Signed-off-by: NSuniel Mahesh <sunil.m@techveda.org>
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由 Weijie Gao 提交于
This patch enables CONFIG_BLOCK_CACHE for mt7623n_bpir2. Signed-off-by: NWeijie Gao <weijie.gao@mediatek.com>
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由 Weijie Gao 提交于
eMMC device has multiple hw partitions both address from zero. However the mmc driver lacks block cache invalidation for switch hwpart. This causes a problem that data of current hw partition is cached before switching to another hw partition. And the following read operation of the latter hw partition will get wrong data when reading from the addresses that have been cached previously. To solve this problem, invalidate block cache after a successful mmc_switch_part() operation. Signed-off-by: NWeijie Gao <weijie.gao@mediatek.com> Tested-by: NFelix Brack <fb@ltec.ch>
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由 Weijie Gao 提交于
This reverts commit 0ebe112d. Most block devices have only one hwpart. Multiple hwparts only found used by eMMC devices in u-boot. The mmc driver do blk_dselect_hwpart() at the beginning of mmc_bread() which causes block cache being invalidated too frequently and makes block cache useless. So it's not a good idea to put blkcache_invalidate() in the common functions. It should be called inside mmc_select_hwpart(). Signed-off-by: NWeijie Gao <weijie.gao@mediatek.com> Tested-by: NFelix Brack <fb@ltec.ch>
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由 Stephen Warren 提交于
The current code in reserve_noncached() has two issues: 1) The first update of gd->start_addr_sp always rounds down to a section start. However, the equivalent calculation in cache.c:noncached_init() always first rounds up to a section start, then subtracts a section size. These two calculations differ if the initial value is already rounded to section alignment. 2) The second update of gd->start_addr_sp subtracts exactly CONFIG_SYS_NONCACHED_MEMORY, whereas the equivalent calculation in cache.c:noncached_init() rounds the noncached size up to section alignment before subtracting it. The two calculations differ if the noncached region size is not a multiple of the MMU section size. In practice, one/both of those issues causes a practical problem on Jetson TX1; U-Boot triggers a synchronous abort during initialization, likely due to overlapping use of some memory region. This change fixes both these issues by duplicating the exact calculations from noncached_init() into reserve_noncached(). However, this fix assumes that gd->start_addr_sp on entry to reserve_noncached() exactly matches mem_malloc_start on entry to noncached_init(). I haven't traced the code to see whether it absolutely guarantees this in all (or indeed any!) cases. Consequently, I added some comments in the hope that this condition will continue to be true. Fixes: 5f7adb5b ("board_f: reserve noncached space below malloc area") Cc: Vikas Manocha <vikas.manocha@st.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 29 8月, 2019 5 次提交
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https://gitlab.denx.de/u-boot/custodians/u-boot-efi由 Tom Rini 提交于
Pull request for UEFI sub-system for v2019.10-rc4 Enable the unit test for UEFI runtime service Exit() on x86_64. Use as standalone UEFI binary for testing the handling of exceptions.
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https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx由 Tom Rini 提交于
Enable DM PCI for T2080RDB, T4240RDB, T1024RDB, T1042D4RDB, P1020RDB, P2020RDB, P2041RDB, P3041DS, P4080DS, and MPC8548CDS
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https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic由 Tom Rini 提交于
- add missing g12b clock driver compatible, fixing odroid-n2 usb support
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由 Heinrich Schuchardt 提交于
To fully demonstrate crash outputs for UEFI images provide a standalone UEFI application that tries to invoke an illegal opcode. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 Heinrich Schuchardt 提交于
Enable unit tests for StartImage() and Exit() unit tests on x86_64. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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- 28 8月, 2019 2 次提交
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由 Hou Zhiqiang 提交于
Enable the DM PCIe driver in MPC8548CDS defconfig. Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Hou Zhiqiang 提交于
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled. Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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