- 25 2月, 2016 1 次提交
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由 Alison Wang 提交于
As QSPI and IFC are pin-multiplexed on LS1021A, only IFC is supported in SD boot now. For the customer's demand, QSPI needs to be supported in SD boot too. This patch adds QSPI or IFC support in SD boot according to the corresponding defconfig. For detail, ls1021aqds_sdcard_ifc_defconfig is used to support IFC in SD boot and ls1021aqds_sdcard_qspi_defconfig is used to support QSPI in SD boot. Signed-off-by: NAlison Wang <alison.wang@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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- 22 4月, 2015 1 次提交
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由 Alison Wang 提交于
On QDS board with DDR4 DIMM, LPUART is used as console output to verify DCU driver. This patch adds ls1021aqds_ddr4_nor_lpuart_defconfig for this support. Signed-off-by: NAlison Wang <alison.wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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- 24 1月, 2015 1 次提交
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由 Alison Wang 提交于
This patch adds LPUART support for LS1021AQDS board. For ls1021aqds_nor_lpuart_defconfig, LPUART is used as the console. Signed-off-by: NAlison Wang <alison.wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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- 12 12月, 2014 3 次提交
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由 Alison Wang 提交于
This patch adds NAND boot support for LS1021AQDS board. SPL framework is used. PBL initialize the internal RAM and copy SPL to it, then SPL initialize DDR using SPD and copy u-boot from NAND flash to DDR, finally SPL transfer control to u-boot. Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: NAlison Wang <alison.wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Alison Wang 提交于
This patch adds QSPI boot support for LS1021AQDS/TWR board. The QSPI boot image need to be programmed into the QSPI flash first. Then the booting will start from QSPI memory space. Signed-off-by: NAlison Wang <alison.wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Alison Wang 提交于
This patch adds SD boot support for LS1021AQDS board. SPL framework is used. PBL initialize the internal RAM and copy SPL to it, then SPL initialize DDR using SPD and copy u-boot from SD card to DDR, finally SPL transfer control to u-boot. Signed-off-by: NAlison Wang <alison.wang@freescale.com> Signed-off-by: NJason Jin <jason.jin@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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- 17 10月, 2014 1 次提交
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由 Ruchika Gupta 提交于
Signed-off-by: NRuchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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- 26 9月, 2014 1 次提交
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由 York Sun 提交于
LS1021AQDS has a variant with DDR4 slot. This patch adds a new defconfig for this variant to enable DDR4 support. RAW timing parameters are not added for DDR4. The board timing parameters are only tuned for single- rank 1600 and 1800MT/s with Micron DIMM 9ASF51272AZ-2G1A1 due to DIMM availability. Signed-off-by: NYork Sun <yorksun@freescale.com> CC: Alison Wang <alison.wang@freescale.com>
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- 09 9月, 2014 1 次提交
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由 Wang Huan 提交于
LS102xA is an ARMv7 implementation. This patch is to add basic support for LS1021AQDS board. One DDR controller DUART1 is used as the console For the detail board information, please refer to README. Signed-off-by: NAlison Wang <alison.wang@freescale.com> Signed-off-by: NJason Jin <jason.jin@freescale.com> Signed-off-by: NYork Sun <yorksun@freescale.com> Signed-off-by: NYuan Yao <yao.yuan@freescale.com> Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
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