- 22 7月, 2016 38 次提交
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由 Thomas Gleixner 提交于
Booting a payload out of NAND FLASH from the SPL is a crux today, as it requires hard partioned FLASH. Not a brilliant idea with the reliability of todays NAND FLASH chips. The upstream UBI + UBI fastmap implementation which is about to brought to u-boot is too heavy weight for SPLs as it provides way more functionality than needed for a SPL and does not even fit into the restricted SPL areas which are loaded from the SoC boot ROM. So this provides a fast and lightweight implementation of UBI scanning and UBI fastmap attach. The scan and logical to physical block mapping code is developed from scratch, while the fastmap implementation is lifted from the linux kernel source and stripped down to fit the SPL needs. The text foot print on the board which I used for development is: 6854 0 0 6854 1abd drivers/mtd/ubispl/built-in.o Attaching a NAND chip with 4096 physical eraseblocks (4 blocks are reserved for the SPL) takes: In full scan mode: 1172ms In fastmap mode: 95ms The code requires quite some storage. The largest and unknown part of it is the number of fastmap blocks to read. Therefor the data structure is not put into the BSS. The code requires a pointer to free memory handed in which is initialized by the UBI attach code itself. See doc/README.ubispl for further information on how to use it. This shares the ubi-media.h and crc32 implementation of drivers/mtd/ubi There is no way to share the fastmap code, as UBISPL only utilizes the slightly modified functions ubi_attach_fastmap() and ubi_scan_fastmap() from the original kernel ubi fastmap implementation. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NLadislav Michl <ladis@linux-mips.org> Acked-by: NHeiko Schocher <hs@denx.de> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Ladislav Michl 提交于
Signed-off-by: NLadislav Michl <ladis@linux-mips.org>
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由 Thomas Gleixner 提交于
To support UBI in SPL we need a simple NAND read function. Add one to nand_spl_simple and keep it as simple as it goes. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NLadislav Michl <ladis@linux-mips.org> Acked-by: NScott Wood <oss@buserror.net> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NHeiko Schocher <hs@denx.de>
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由 Ladislav Michl 提交于
Signed-off-by: NLadislav Michl <ladis@linux-mips.org> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NHeiko Schocher <hs@denx.de>
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由 mario.six@gdsys.cc 提交于
This patch implements the reading functionality for the generic I2C EEPROM driver, which was just a non-functional stub until now. Since the page size will be of importance for the writing support, we add suitable members to the private data structure to keep track of it. Compatibility strings for a range of at24c* chips are added. Signed-off-by: NMario Six <mario.six@gdsys.cc> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NHeiko Schocher <hs@denx.de>
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Remove unnecessary board specifc config files for zynq boards(microzed, picozed, ZC770(all), zed) and point to zynq common config file. Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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Enable config CONFIG_SYS_NO_FLASH through defconfig for all zynq boards. Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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Move config option CONFIG_SYS_NO_FLASH as Kconfig option. All the boards which needs to enable this option can be done through defconfigs Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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Define config USB_STORAGE through defconfig for all respective zynq boards Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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Add Kconfig entry config option for USB_EHCI_ZYNQ and update the same to enable for all zynq boards which supports USB Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Alexander Graf 提交于
The EP platform also has working AHCI emulation, so I see little reason not to implement the plumbing for it that enables us to boot from AHCI. Signed-off-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Code around was removed because of move to Kconfig. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Simple version of clk_get_by_index() added by: "dm: clk: Add a simple version of clk_get_by_index()" (sha1: a4b10c08) is only working for #clock-cells=<1> but not for any other values. Fixed clocks is using #clock-cells=<0> which requires full implementation. Remove simplified versions of clk_get_by_index() and use full version. Also remove empty clk_get_by_name() which is failing when it is called which is useless. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Acked-by: NStephen Warren <swarren@nvidia.com>
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由 Michal Simek 提交于
ZynqMP will use reading clock freq directly from DT. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Read information about clock frequency from DT. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NMoritz Fischer <moritz.fischer@ettus.com>
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由 Michal Simek 提交于
Compile SPL for all boards even psu_init.c/h files are not in the tree yet. But this change enables covering SPL issues in mainline. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Serial driver starts to use clk framework that's why enable it by default. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Make code 64bit aware. Warnings: +../arch/arm/lib/spl.c: In function ‘jump_to_image_linux’: +../arch/arm/lib/spl.c:63:3: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] +../common/spl/spl_fat.c: In function ‘spl_load_image_fat’: +../common/spl/spl_fat.c:91:33: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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Disable internal clock by clearing the internal clock enable bit. This bit needs to be cleared too when we stop the SDCLK for changing the frequency divisor. This bit should be set to zero when the device is not using the Host controller. Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
When CONFIG_API is selected with DM_ETH this error is present: api/api_net.c: In function 'dev_enum_net': api/api_net.c:61:35: warning: initialization from incompatible pointer type struct eth_device *eth_current = eth_get_dev(); ^ api/api_net.c:68:39: error: dereferencing pointer to incomplete type memcpy(di->di_net.hwaddr, eth_current->enetaddr, 6); ^ Disable api_net functions when ETH_DM is selected. Signed-off-by: NChris Johns <chrisj@rtems.org> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Based on: "ARM: uniphier: use the default CONFIG_BOOTDELAY=2" (sha1: 7c8ef0fe) "I do not insist on CONFIG_BOOTDELAY=3. The default value in Kconfig, CONFIG_BOOTDELAY=2, is just fine for these boards." Reported-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Tom Rini 提交于
Per Vikas' request, the problem this commit is supposed to be solving is something he doesn't see and further this introduces additional hardware requirements. This reverts commit 4b2fd720. Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Scott Wood 提交于
Loading the fdt at 0xc00000 fails if the uncompressed kernel image is greater than 12 MiB, which is quite common with modern kernels and multiplatform defconfigs. Move fdtaddr to 0x1e00000 which is just under the ramdiskaddr on most targets. Signed-off-by: NScott Wood <oss@buserror.net> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Dirk Eibach <eibach@gdsys.de> Cc: Andy Fleming <afleming@gmail.com> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Sumit Garg 提交于
Adds information regarding SPL handling validation process of main u-boot image on power/mpc85xx and arm/layerscape platforms. Signed-off-by: NSumit Garg <sumit.garg@nxp.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Sumit Garg 提交于
For mpc85xx SoCs, the core begins execution from address 0xFFFFFFFC. In non-secure boot scenario from NAND, this address will map to CPC configured as SRAM. But in case of secure boot, this default address always maps to IBR (Internal Boot ROM). The IBR code requires that the bootloader(U-boot) must lie in 0 to 3.5G address space i.e. 0x0 - 0xDFFFFFFF. For secure boot target from NAND, the text base for SPL is kept same as non-secure boot target i.e. 0xFFFx_xxxx but the SPL U-boot binary will be copied to CPC configured as SRAM with address in 0-3.5G(0xBFFC_0000) As a the virtual and physical address of CPC would be different. The virtual address 0xFFFx_xxxx needs to be mapped to physical address 0xBFFx_xxxx. Create a new PBI file to configure CPC as SRAM with address 0xBFFC0000 and update DCFG SCRTACH1 register with location of Header required for secure boot. The changes are similar to commit 467a40df powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P3041 While P3041 has a 1MB CPC and does not require SPL. On T104x, CPC is only 256K and thus SPL framework is used. The changes are only applicable for SPL U-Boot running out of CPC SRAM and not the next level U-Boot loaded on DDR. Reviewed-by: NRuchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NAneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: NSumit Garg <sumit.garg@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Sumit Garg 提交于
As part of Chain of Trust for Secure boot, the SPL U-Boot will validate the next level U-boot image. Add a new function spl_validate_uboot to perform the validation. Enable hardware crypto operations in SPL using SEC block. In case of Secure Boot, PAMU is not bypassed. For allowing SEC block access to CPC configured as SRAM, configure PAMU. Reviewed-by: NRuchika Gupta <ruchika.gupta@nxp.com> Signed-off-by: NAneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: NSumit Garg <sumit.garg@nxp.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Kevin Hao 提交于
Due to the blow up of the latest kernel size, the default gnuzip size (8M) seems too small. The yocto kernel size I built for mpc8315erdb board is 5294393, and it can't be boot by using the latest u-boot. So expand gnuzip buffer for all the mpc83xx boards to fix this issue. Robert P. J. Day also pointed that the kernel partition on the NAND flash is also too small, fix it at the same time. Reported-by: NRobert P. J. Day <rpjday@crashcourse.ca> Signed-off-by: NKevin Hao <kexin.hao@windriver.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Kevin Hao 提交于
Robert P. J. Day has pointed that the value of SYS_MONITOR_LEN in MPC8315ERDB.h is smaller than the u-boot.bin. This will cause the overlap between the code of u-boot and the environment variable. So when executing saveenv, it will corrupt the code of u-boot and causes the board not boot. Fix this for all the mpc83xx boards by reserving a 512K area. Reported-by: NRobert P. J. Day <rpjday@crashcourse.ca> Signed-off-by: NKevin Hao <kexin.hao@windriver.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Stephen Warren 提交于
On Tegra186, U-Boot is booted by the binary firmware as if it were a Linux kernel. Consequently, a DTB is passed to U-Boot. Cache the address of that DTB, and parse the /memory/reg property to determine the actual RAM regions that U-Boot and subsequent EL2/EL1 SW may actually use. Given the binary FW passes a DTB to U-Boot, I anticipate the suggestion that U-Boot use that DTB as its control DTB. I don't believe that would work well, so I do not plan to put any effort into this. By default the FW-supplied DTB is the L4T kernel's DTB, which uses non-upstreamed DT bindings. U-Boot aims to use only upstreamed DT bindings, or as close as it can get. Replacing this DTB with a DTB using upstream bindings is physically quite easy; simply replace the content of one of the GPT partitions on the eMMC. However, the binary FW at least partially relies on the existence/content of some nodes in the DTB, and that requires the DTB to be written according to downstream bindings. Equally, if U-Boot continues to use appended DTBs built from its own source tree, as it does for all other Tegra platforms, development and deployment is much easier. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Stephen Warren 提交于
Implement a hook to allow boards to save boot-time CPU state for later use. When U-Boot is chain-loaded by another bootloader, CPU registers may contain useful information such as system configuration information. This feature mirrors the equivalent ARMv7 feature. Signed-off-by: NStephen Warren <swarren@nvidia.com> Reviewed-by: NTom Rini <trini@konsulko.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Stephen Warren 提交于
Rev A03 of P2180 requires some PMIC programming adjustments, yet the PMIC's own OTP has not been updated. Consequently, U-Boot must make these changes itself. NVIDIA's syseng team has confirmed that these changes can be enabled on all board revisions without issue. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Stephen Warren 提交于
IVC (Inter-VM Communication) protocol is a Tegra-specific IPC (Inter Processor Communication) framework. Within the context of U-Boot, it is typically used for communication between the main CPU and various auxiliary processors. In particular, it will be used to communicate with the BPMP (Boot and Power Management Processor) on Tegra186 in order to manipulate clocks and reset signals. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Stephen Warren 提交于
Many files in arch/arm/mach-tegra are compiled conditionally based on Kconfig variables, or applicable to all platforms. We can let the main Tegra Makefile handle compiling (or not) those files to avoid each SoC- specific Makefile needing to duplicate entries for those files. This leaves the SoC-specific Makefiles to compile truly SoC-specific code. In the future, we'll hopefully add Kconfig variables for all the other files, and refactor those files, and so reduce the need for SoC-specific Makefiles and/or ifdefs in the Makefiles. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Stephen Warren 提交于
There are multiple versions of p2771-0000 board. There are SW visible incompatible differences between the versions, and they are relevant to U-Boot. Create separate "A02" and "B00" defconfigs (named after the first and/or only board rev the defconfig supports) so that users can select which build they want. With the minimal set of HW currently enabled in U-Boot, the differences are irrelevant, hence the DT files aren't different. However, that will change in a future patch. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Stephen Warren 提交于
Tegra186 uses different GPIO port IDs compared to previous chips. Make sure the SoC DT file includes the correct GPIO binding header. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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- 21 7月, 2016 2 次提交
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由 Masahiro Yamada 提交于
Commit 555f45d8 ("image: Convert the IH_... values to enums") accidentally changed some IH_ARCH_... values. Prior to that commit, there existed a gap between IH_ARCH_M68K and IH_ARCH_MICROBLAZE, like follows. #define IH_ARCH_SPARC64 11 /* Sparc 64 Bit */ #define IH_ARCH_M68K 12 /* M68K */ #define IH_ARCH_MICROBLAZE 14 /* MicroBlaze */ #define IH_ARCH_NIOS2 15 /* Nios-II */ The enum conversion broke the compatibility with existing uImage files. Reverting 555f45d8 will cause build error unfortunately, so here is a more easy fix. I dug the git history and figured out the gap was introduced by commit 1117cbf2 ("nios: remove nios-32 arch"). So, I revived IH_ARCH_NIOS just for filling the gap. I added comments to each enum block. Once we assign a value to IH_... it is not allowed to change it. Acked-by: NMichal Simek <michal.simek@xilinx.com> Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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