- 13 5月, 2014 1 次提交
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由 Masahiro Yamada 提交于
CONFIG_BOARDDIR is not referenced in these linker scripts. The comment /* CONFIG_BOARDDIR */ is misleading. Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
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- 23 4月, 2014 2 次提交
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由 Prabhakar Kushwaha 提交于
Current SPL code base has BSS section placed after reset_vector. This means they have to relocate to use the global variables. This put an implicit requirement of having SPL size = Memory/2. To avoid relocation: - Move bss_section within SPL range - Modify relocate_code() Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Prabhakar Kushwaha 提交于
SPL linker has fix location of bootpg and reset vector with respect to text base. It is not necessary to have fixed locations. Avoid such hardcoding. Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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- 22 1月, 2014 1 次提交
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由 Po Liu 提交于
Using the TPL method for nand boot by sram was already supported. Here add some code for mpc85xx ifc nand boot. - For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec. - Use a clear function name for nand spl boot. - Add CONFIG_SPL_DRIVERS_MISC_SUPPORT to compile the fsl_ifc.c in spl/Makefile; Signed-off-by: NPo Liu <Po.Liu@freescale.com> Acked-by: NScott Wood <scottwood@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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- 09 9月, 2013 1 次提交
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由 Ying Zhang 提交于
- Added section "u_boot_list" in arch/powerpc/cpu/mpc85xx/u-boot-spl.lds - Use the function i2c_init_all instead of i2c_init Signed-off-by: NYing Zhang <b40530@freescale.com>
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- 21 8月, 2013 1 次提交
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由 Ying Zhang 提交于
The code from the internal on-chip ROM. It loads the final uboot image into DDR, then jump to it to begin execution. The SPL's size is sizeable, the maximum size must not exceed the size of L2 SRAM. It initializes the DDR through SPD code, and copys final uboot image to DDR. So there are two stage uboot images: * spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that ddr spd code can get the interleaving mode setting in env. It loads final uboot image from offset 96KB. * final uboot image, size is variable depends on the functions enabled. Signed-off-by: NYing Zhang <b40530@freescale.com> Acked-by: NYork Sun <yorksun@freescale.com>
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- 24 7月, 2013 1 次提交
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由 Wolfgang Denk 提交于
Signed-off-by: NWolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: NTom Rini <trini@ti.com>
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- 21 6月, 2013 3 次提交
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由 Ying Zhang 提交于
There will clear the BSS in the function clear_bss(), the reset address of the BSS started from the __bss_start, and increased by four-byte increments, finally stoped depending on the address is equal to the _bss_end. If the end address __bss_end is not alignment to 4byte, it will be an infinite loop. 1. The reset action stoped depending on the reset address is greater than or equal the end address of the BSS. 2. The end address of the BSS should be 4byte aligned. Because the reset unit is 4 Bytes. This patch is on top of the patch "powerpc/mpc85xx: support application without resetvec segment in the linker script". Signed-off-by: NYing Zhang <b40530@freescale.com> Signed-off-by: NAndy Fleming <afleming@freescale.com>
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由 Ying Zhang 提交于
For SD/SPI 2-stage bootloader, the On-Chip Rom code loads the SPL into L2 SRAM, then jump to it to begin execution. After that, the SPL loads the final uboot image into DDR, then jump to it to begin execution. The segment .resetvec in the SPL and in final U-boot is useless. So, add new symbols CONFIG_SYS_MPC85XX_NO_RESETVEC for this application. If CONFIG_SYS_MPC85XX_NO_RESETVEC is set, the segment .resetvec is excluded and the segment .bootpg is placed in the previous 4K of the segment .text. Signed-off-by: NYing Zhang <b40530@freescale.com> Signed-off-by: NAndy Fleming <afleming@freescale.com>
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由 Prabhakar Kushwaha 提交于
Linker script is not able find start.o binary. So add its absolute path in u-boot-spl.lds. This change is similar to u-boot-nand.lds common/Makefile: Avoid compiling unnecssary files fsl_ifc_spl.c : It is is responsible for reading u-boot binary from NAND flash and copying into DDR. It also transfer control from NAND SPL to u-boot image present in DDR. Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: NAndy Fleming <afleming@freescale.com>
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- 16 3月, 2013 1 次提交
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由 Simon Glass 提交于
Note this is a tree-wide change affecting multiple architectures. At present we use __bss_start, but mostly __bss_end__. This seems inconsistent and in a number of places __bss_end is used instead. Change to use __bss_end for the BSS end symbol throughout U-Boot. This makes it possible to use the asm-generic/sections.h file on all archs. Signed-off-by: NSimon Glass <sjg@chromium.org>
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- 27 11月, 2012 1 次提交
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由 Scott Wood 提交于
Update CONFIG_RAMBOOT and CONFIG_NAND_SPL references to accept CONFIG_SPL and CONFIG_SPL_BUILD, respectively. CONFIG_NAND_SPL can be removed once the last mpc85xx nand_spl target is gone. CONFIG_RAMBOOT will need to remain for other use cases, but it doesn't seem right to overload it for meaning SPL as well as nand_spl does. Even if it's somewhat appropriate for the main u-boot, the SPL itself isn't (necessarily) ramboot, and we don't have separate configs for SPL and main u-boot. It was also inconsistent, as other platforms such as mpc83xx didn't use CONFIG_RAMBOOT in this way. Signed-off-by: NScott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
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- 22 10月, 2012 1 次提交
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由 Marek Vasut 提交于
Add section for the linker-generated lists into all possible linker files, so that everyone can easily use these lists. This is mostly a mechanical adjustment. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Mike Frysinger <vapier@gentoo.org>
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- 19 5月, 2012 1 次提交
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由 Scott Wood 提交于
GOT is now handled the way the main u-boot.lds does it. Without this, the boot hangs when built with newer GCC (since 4.6). Older toolchains hid the issue by converting -fpic to -fPIC. Signed-off-by: NScott Wood <scottwood@freescale.com>
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- 30 9月, 2011 1 次提交
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由 Dipen Dudhat 提交于
Add NAND support (including spl) on IFC, such as is found on the p1010. Note that using hardware ECC on IFC with small-page NAND (which is what comes on the p1010rdb reference board) means there will be insufficient OOB space for JFFS2, since IFC does not support 1-bit ECC. UBI should work, as it does not use OOB for anything but ECC. When hardware ECC is not enabled in CSOR, software ECC is now used. Signed-off-by: NDipen Dudhat <Dipen.Dudhat@freescale.com> [scottwood@freescale.com: ECC rework and misc fixes] Signed-off-by: NScott Wood <scottwood@freescale.com>
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- 28 3月, 2011 1 次提交
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由 Po-Yu Chuang 提交于
Currently, _end is used for end of BSS section. We want _end to mean end of u-boot image, so we rename _end to __bss_end__ first. Signed-off-by: NPo-Yu Chuang <ratbert@faraday-tech.com>
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- 11 11月, 2010 1 次提交
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由 Haiying Wang 提交于
Fix u-boot-nand.lds and u-boot-nand_spl.lds according to: Author: Peter Tyser <ptyser@xes-inc.com> Date: Wed Sep 29 14:05:56 2010 -0500 commit fbe53f59 85xx: Use gc-sections to reduce image size Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 22 4月, 2010 1 次提交
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由 Stefan Roese 提交于
As discussed on the list, move "arch/ppc" to "arch/powerpc" to better match the Linux directory structure. Please note that this patch also changes the "ppc" target in MAKEALL to "powerpc" to match this new infrastructure. But "ppc" is kept as an alias for now, to not break compatibility with scripts using this name. Signed-off-by: NStefan Roese <sr@denx.de> Acked-by: NWolfgang Denk <wd@denx.de> Acked-by: NDetlev Zundel <dzu@denx.de> Acked-by: NKim Phillips <kim.phillips@freescale.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Anatolij Gustschin <agust@denx.de>
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- 13 4月, 2010 1 次提交
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由 Peter Tyser 提交于
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
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- 03 10月, 2009 1 次提交
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由 Mingkai Hu 提交于
The first stage 4K image uses a seperate ld script file to generate 4K image. This patch moves it to the cpu/mpc85xx/* to make it avaliable for 85xx platform. Signed-off-by: NMingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 21 3月, 2009 1 次提交
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由 Trent Piepho 提交于
A recent gcc added a new unaligned rodata section called '.rodata.str1.1', which needs to be added the the linker script. Instead of just adding this one section, we use a wildcard ".rodata*" to get all rodata linker section gcc has now and might add in the future. However, '*(.rodata*)' by itself will result in sub-optimal section ordering. The sections will be sorted by object file, which causes extra padding between the unaligned rodata.str.1.1 of one object file and the aligned rodata of the next object file. This is easy to fix by using the SORT_BY_ALIGNMENT command. This patch has not be tested one most of the boards modified. Some boards have a linker script that looks something like this: *(.text) . = ALIGN(16); *(.rodata) *(.rodata.str1.4) *(.eh_frame) I change this to: *(.text) . = ALIGN(16); *(.eh_frame) *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) This means the start of rodata will no longer be 16 bytes aligned. However, the boundary between text and rodata/eh_frame is still aligned to 16 bytes, which is what I think the real purpose of the ALIGN call is. Signed-off-by: NTrent Piepho <xyzzy@speakeasy.org>
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- 24 1月, 2009 1 次提交
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由 Ron Madrid 提交于
This patch will create a new board, SIMPC8313, from Sheldon Instruments. This board boots from NAND devices and is configureable for either large or small page devices. The board supports non-soldered DDR2, one ethernet port, a Marvell 88E1118 PHY, and PCI host support. The board also has a FPGA connected to the eLBC providing glue logic to a TMS320C67xx DSP. Signed-off-by: NRon Madrid <ron_madrid@sbcglobal.net> Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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- 13 8月, 2008 1 次提交
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由 Scott Wood 提交于
Note that with older board revisions, NAND boot may only work after a power-on reset, and not after a warm reset. I don't have a newer board to test on; if you have a board with a 33MHz crystal, please let me know if it works after a warm reset. Signed-off-by: NScott Wood <scottwood@freescale.com>
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- 13 1月, 2008 1 次提交
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由 Wolfgang Denk 提交于
With recent toolchain versions, some boards would not build because or errors like this one (here for ocotea board when building with ELDK 4.2 beta): ppc_4xx-ld: section .bootpg [fffff000 -> fffff23b] overlaps section .bss [fffee900 -> fffff8ab] For many boards, the .bss section is big enough that it wraps around at the end of the address space (0xFFFFFFFF), so the problem will not be visible unless you use a 64 bit tool chain for development. On some boards however, changes to the code size (due to different optimizations) we bail out with section overlaps like above. The fix is to add the NOLOAD attribute to the .bss and .sbss sections, telling the linker that .bss does not consume any space in the image. Signed-off-by: NWolfgang Denk <wd@denx.de>
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- 30 5月, 2006 1 次提交
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由 Wolfgang Denk 提交于
- Add IXP4xx NPE ethernet MAC support - Add support for Intel IXDPG425 board - Add support for Prodrive PDNB3 board - Add IRQ support Patch by Stefan Roese, 23 May 2006 [This patch does not include cpu/ixp/npe/IxNpeMicrocode.c which still sufferes from licensing issues. Blame Intel.]
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- 31 8月, 2005 1 次提交
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由 Wolfgang Denk 提交于
Pointed out by Gerhard Jaeger, 31 Aug 2005; cf. http://sourceware.org/ml/binutils/2005-08/msg00412.html
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- 09 2月, 2004 1 次提交
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由 wdenk 提交于
ARM memory layout fixes: the abort-stack is now set up in the correct RAM area, and the BSS is zeroed out as it should be. Furthermore, the magic variables 'armboot_end' and 'armboot_end_data' of the linker scripts are replaced by '__bss_start' and '_end', resp., which is a further step to eliminate unnecessary differences between the implementation of the CPU architectures.
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- 31 10月, 2003 1 次提交
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由 wdenk 提交于
* Patch by Kyle Harris, 30 Oct 2003: Fix build errors for ixdp425 board * Patch by David M. Horn, 29 Oct 2003: Fixes to build under CYGWIN * Get IceCube MGT5100 working (again)
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- 16 10月, 2003 1 次提交
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由 wdenk 提交于
- Added Motorola CPU 8540/8560 support (cpu/85xx) - Added Motorola MPC8540ADS board support (board/mpc8540ads) - Added Motorola MPC8560ADS board support (board/mpc8560ads) * Minor code cleanup
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- 15 10月, 2003 1 次提交
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由 wdenk 提交于
* Make 5200 reset command _really_ reset the board, without running any other code after it * Fix flash mapping and display on P3G4 board * Patch by Kyle Harris, 15 Jul 2003: - add support for Intel IXP425 CPU - add support for IXDP425 eval board
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- 28 6月, 2003 1 次提交
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由 wdenk 提交于
- remove trailing white space, trailing empty lines, C++ comments, etc. - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c) * Patches by Kenneth Johansson, 25 Jun 2003: - major rework of command structure (work done mostly by Michal Cendrowski and Joakim Kristiansen)
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- 20 6月, 2003 1 次提交
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由 wdenk 提交于
- add support for Logotronic DL datalogger board - cleanup serial line after kermit binary download - add debugX macro (debug level support) - update mach-types.h to latest arm.linux.org.uk master list.
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- 23 5月, 2003 1 次提交
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由 wdenk 提交于
In preparation for an ixp port, rename cpu/xscale and arch-xscale into cpu/pxa and arch-pxa.
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- 06 3月, 2003 1 次提交
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由 wdenk 提交于
- fix bug in BOOTP code (must use NetCopyIP) - update of CSB226 port - clear BSS segment on XScale - added support for i2c_init_board() function - update to the Innokom plattform * Extend support for redundand environments for configurations where environment size < sector size
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- 27 10月, 2002 1 次提交
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由 wdenk 提交于
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- 08 10月, 2002 1 次提交
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由 wdenk 提交于
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- 28 12月, 2000 1 次提交
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由 wdenk 提交于
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- 14 12月, 2000 1 次提交
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由 wdenk 提交于
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- 13 11月, 2000 1 次提交
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由 wdenk 提交于
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