- 01 9月, 2012 40 次提交
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由 Tetsuyuki Kobayashi 提交于
save_boot_params_default() in cpu.c accesses uninitialized stack area when it compiled with -O0 (not optimized). This patch removes save_boot_params_default() and put the equivalent in start.S Signed-off-by: NTetsuyuki Kobayashi <koba@kmckk.co.jp> Acked-by: NTom Rini <trini@ti.com>
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由 Allen Martin 提交于
These flags were necessary when building tegra20 as a single binary that supported ARM7TDMI and Cortex A9. Now that the ARM7TDMI support is split into a separate SPL, this is no longer necessary. Signed-off-by: NAllen Martin <amartin@nvidia.com> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Allen Martin 提交于
This fixes the SPL build to link with the SPL version of libgcc if USE_PRIVATE_LIBGCC is set to "yes". Previously it was linking with the libgcc from the normal u-boot build because it gets set in PLATFORM_LIBS and passed down the to the SPL build. Signed-off-by: NAllen Martin <amartin@nvidia.com> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Allen Martin 提交于
Enable the building of private libgcc for SPL Signed-off-by: NAllen Martin <amartin@nvidia.com> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Allen Martin 提交于
Add SPL options to tegra20 config files and enable SPL build for tegra20 boards. Also remove redundant code from u-boot that is not contained in SPL. Signed-off-by: NAllen Martin <amartin@nvidia.com> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Allen Martin 提交于
Move warmboot_save_sdram_params() to later in the boot sequence. This code relies on devicetree to get the address of the memory controller and with upcoming changes for SPL boot it gets called early in the boot process when devicetree is not initialized yet. Signed-off-by: NAllen Martin <amartin@nvidia.com> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Allen Martin 提交于
Add target for tegra20 u-boot image. This is a concatenation of tegra spl and normal u-boot binaries. For non-devicetree builds this is named "u-boot-nodtb-tegra.bin" for devicetree builds is named "u-boot-dtb-tegra.bin". Signed-off-by: NAllen Martin <amartin@nvidia.com> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Allen Martin 提交于
Add support for tegra20 arm7 boot processor. This processor is used to power on the Cortex A9 and transfer control to it. In tegra this processor is an ARM7TDMI not an ARM720T, but since we don't use cache it was easier to just reuse the ARM720T code as the processors are otherwise identical except for cache and MMU. Signed-off-by: NAllen Martin <amartin@nvidia.com> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Allen Martin 提交于
Don't use timer_init from tegra board.c. This comes out of arm720t for the SPL build. Signed-off-by: NAllen Martin <amartin@nvidia.com> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Allen Martin 提交于
Take a few SPL fixes from armv7 and apply them to arm720t: -Use dummy exception handlers for SPL build -Initialize relocation register r9 to 0 for the case of no relocation -ifdef out interrupt handler code Signed-off-by: NAllen Martin <amartin@nvidia.com> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Allen Martin 提交于
Update MAKEALL to handle the optional SPL CPU field that was added to boards.cfg. This impacts the cases in MAKEALL that have to match against CPU type (field 3). In these cases use ':' as a field separator to split the u-boot CPU from the SPL CPU. Signed-off-by: NAllen Martin <amartin@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Allen Martin 提交于
This adds some cleanup to mkconfig related to SPL support. Bash specific script has been replaced with awk for better shell compatibility. config.mk generation is done through a subshell and single redirect to improve readability. Signed-off-by: NAllen Martin <amartin@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Allen Martin 提交于
Change the mkdir commands for the object directories to be unconditional. This fixes an issue when building for SPL where SRCTREE and OBJTREE are the same, but $(obj) is under SPLTREE. Signed-off-by: NAllen Martin <amartin@nvidia.com> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Allen Martin 提交于
Add tegra20-common-post.h to be consistent with other tegra20 boards. Signed-off-by: NAllen Martin <amartin@nvidia.com> Acked-by: NThierry Reding <thierry.reding@avionic-design.de> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Allen Martin 提交于
Rename CONFIG_MACH_TEGRA_GENERIC to the less confusing CONFIG_TEGRA. The meaning of the config options is now: CONFIG_TEGRA - Any tegra chip CONFIG_TEGRA20 - A tegra20 family chip CONFIG_TEGRA30 - A tegra30 family chip (not added yet) Signed-off-by: NAllen Martin <amartin@nvidia.com> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Allen Martin 提交于
In preparation for splitting out the armv4t code from tegra20, move the tegra20 SoC code to arch/arm/cpu/tegra20-common. This code will be compiled armv4t for the arm7tdmi and armv7 for the cortex A9. Signed-off-by: NAllen Martin <amartin@nvidia.com> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Allen Martin 提交于
This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: NAllen Martin <amartin@nvidia.com> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Stephen Warren 提交于
The Raspberry Pi model B uses the BCM2835 SoC, has 256MB of RAM, contains an SMSC 9512 USB LAN/Hub chip, and various IO connectors. For more details, see http://www.raspberrypi.org/. Various portions (cache enable, MACH_TYPE setup, RAM size limit, stack relocation to top of RAM) extracted from work by: Oleksandr Tymoshenko <gonzo@bluezbox.com>. GPIO driver enablement by Vikram Narayanan <vikram186@gmail.com>. Signed-off-by: NStephen Warren <swarren@wwwdotorg.org> Acked-by: NTom Rini <trini@ti.com>
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由 Stephen Warren 提交于
This SoC is used in the Raspberry Pi, for example. For more details, see: http://www.broadcom.com/products/BCM2835 http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf. Initial support is enough to boot to a serial console, execute a minimal set of U-Boot commands, download data over a serial port, and boot a Linux kernel. No storage or network drivers are implemented. GPIO driver originally by Vikram Narayanan <vikram186@gmail.com> with many fixes from myself. Signed-off-by: NStephen Warren <swarren@wwwdotorg.org>
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由 Stephen Warren 提交于
Note that this affects all users of the ARM1176 CPU that enable CONFIG_ARCH_CPU_INIT, not just the BCM2835 SoC, potentially such as tnetv107x. Cc: Cyril Chemparathy <cyril@ti.com> Signed-off-by: NStephen Warren <swarren@wwwdotorg.org>
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由 Stephen Warren 提交于
All usage of config_cmd_default.h uses <> for the include statement. Update the README to do the same, rather than using "". Signed-off-by: NStephen Warren <swarren@wwwdotorg.org>
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由 Mathieu J. Poirier 提交于
Following ARM's reference manuel for initializing the cache - the kernel won't boot otherwise. Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: NJohn Rigby <john.rigby@linaro.org>
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由 Mathieu J. Poirier 提交于
Some CPU (i.e u8500) need more cache management before launching the Linux kernel. Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: NJohn Rigby <john.rigby@linaro.org>
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由 John Rigby 提交于
Configuration in vexpress and u8500.v1 is different from what is needed in u8500.v2. As such, card configuration specifics need to reside in the board file rather than the driver. Signed-off-by: NJohn Rigby <john.rigby@linaro.org> Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: NTom Rini <trini@ti.com>
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由 Mathieu J. Poirier 提交于
Register mapping has changed on power control chip between the first and second revision. Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: NJohn Rigby <john.rigby@linaro.org> Signed-off-by: NTom Rini <trini@ti.com>
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由 Mathieu J. Poirier 提交于
Functions such as providing power to the MMC device and reading the processor version register should be in the cpu area for access by multiple u8500-based boards. Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: NJohn Rigby <john.rigby@linaro.org> Signed-off-by: NTom Rini <trini@ti.com>
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由 Mathieu J. Poirier 提交于
LAN and GBF need to be powered explicitely, doing so with interface to AB8500 companion chip. Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: NJohn Rigby <john.rigby@linaro.org>
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由 Mathieu J. Poirier 提交于
Addresses between ux500.v1 and ux500.v2 have changed slightly, hence mandating a review of the PRCMU access methods. Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: NJohn Rigby <john.rigby@linaro.org>
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由 Mathieu J. Poirier 提交于
Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: NJohn Rigby <john.rigby@linaro.org>
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由 Mathieu J. Poirier 提交于
Enabling timers and clocks in PRCMU and cleaning up mailbox. Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: NJohn Rigby <john.rigby@linaro.org>
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由 Mathieu J. Poirier 提交于
This is to allow the prcmu functions to be used by multiple u8500-based processors. Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: NJohn Rigby <john.rigby@linaro.org>
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由 Mathieu J. Poirier 提交于
Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: NJohn Rigby <john.rigby@linaro.org> Acked-by: NTom Rini <trini@ti.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Conflicts: drivers/gpio/Makefile
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由 Tom Rini 提交于
We can safely use the same reset code written in C for both Davinci and C6X platforms. In addition the C version of the code is marginally smaller on Davinci. Tested-by: NMatt Porter <mporter@ti.com> Signed-off-by: NTom Rini <trini@ti.com>
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由 Jeroen Hofstee 提交于
Orjan Friberg wrote at [1]: "For the beagleboard, ecc.size is not explicitly set when doing 'nandecc sw'. If it's not set for the NAND_ECC_SOFT case in nand_scan_tail, it's set to 256 bytes. When doing 'nandecc hw', ecc.size is set to 512 bytes. Hence, when changing back to 'nandecc sw' ecc.size remains at 512 bytes and suddenly the format has changed." No patch has been submitted and the issue was still present. This patch adds the mentioned solution. Tested on a tam3517 board. [1] http://lists.denx.de/pipermail/u-boot/2012-February/119002.html cc: Orjan Friberg <of@flatfrog.com> Acked-by: NIgor Grinberg <grinberg@compulab.co.il> Acked-by: NNikita Kiryanov <nikita@compulab.co.il> Signed-off-by: NJeroen Hofstee <jhofstee@victronenergy.com>
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由 Heiko Schocher 提交于
change the behaviour of switch initialization: - rename "pwl" to "lan" in hwconfig parameter "lan" = port 1 with phy addr 2 "lmn" = port 2 with phy addr 3 - if we have a valid switch config file in flash, do not evaluate the settings in the hwconfig "lan" or "lmn" subcommand. - if we have no valid switch config file in flash, start the switch with default values, if we have a "lan" or a "lmn" hwconfig subcommand. If no "lan" or "lmn" is found in hwconfig, do nothing with the switch. Signed-off-by: NHeiko Schocher <hs@denx.de>
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由 Satyanarayana, Sandhya 提交于
This patch updates secure_emif_sdram_config with the same value written to sdram_config during ddr3 initialization. During suspend/resume, this value is copied into sdram_config. With this, a write to sdram_config at the end of resume sequence which triggers an init sequence can be avoided. Without this register write in place, the DDR_RESET line goes low for a few cycles during resume which is a violation of the JEDEC spec. Signed-off-by: NSatyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
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由 Sughosh Ganu 提交于
Also enable the ohci port on hawkboard. These additions result in an increased u-boot size -- adjust the same accordingly in the board's config. Move the usb header for da8xx platforms under arch-davinci. Signed-off-by: NSughosh Ganu <urwithsughosh@gmail.com>
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由 Tom Rini 提交于
Make sure that when we setup the stack before calling s_init() we have the stack have 8-byte alignment for ABI compliance. Tested-by: NAllen Martin <amartin@nvidia.com> Signed-off-by: NTom Rini <trini@ti.com>
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由 Tom Rini 提交于
Make the lowlevel_init function that these platforms have which just sets up the stack and calls a C function available to all armv7 platforms. As part of this we change some of the macros that are used to be more clear. Previously (except for am335x evm) we had been setting CONFIG_SYS_INIT_SP_ADDR to a series of new defines that are equivalent to simply referencing NON_SECURE_SRAM_END. On am335x evm we should have been doing this initially and do now. Cc: Sricharan R <r.sricharan@ti.com> Tested-by: NAllen Martin <amartin@nvidia.com> Signed-off-by: NTom Rini <trini@ti.com>
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由 Tom Rini 提交于
Signed-off-by: NTom Rini <trini@ti.com>
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