- 13 8月, 2015 22 次提交
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由 Paul Kocialkowski 提交于
This adds support for powering off (the omap3 SoC) from the twl4030. This is especially useful when the kernel does not actually power off the device using this method but reboots and leaves it up to the bootloader to actually turn the power off. Reviewed-by: NTom Rini <trini@konsulko.com> Acked-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: NPaul Kocialkowski <contact@paulk.fr>
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由 Vladimir Zapolskiy 提交于
The change adds SPL build support to Timll DevKit3250 board, the generated SPL image can be uploaded over UART5, JTAG or stored on NAND. SPL is designed to load U-boot image from NAND. All new NAND chip defines in board configuration are needed by SPL NAND "simple" framework, the framework is used to reduce potentially duplicated code from LPC32xx SLC NAND driver. Signed-off-by: NVladimir Zapolskiy <vz@mleia.com>
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由 Vladimir Zapolskiy 提交于
This change adds more peripherals to Timll DevKit3250 board, namely MAC and SMSC phy, SLC NAND, GPIO, SPI and I2C. Also the default serial console is changed to UART5, added an option to pass device tree blob by means of bootm, predefined environment variables are slightly extended and reserved space on NAND to store user defined U-boot environment. Signed-off-by: NVladimir Zapolskiy <vz@mleia.com>
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由 Vladimir Zapolskiy 提交于
The change adds support of LPC32xx SLC NAND controller. LPC32xx SoC has two different mutually exclusive NAND controllers to communicate with single and multiple layer chips. This simple driver allows to specify NAND chip timings and defines custom read_buf()/write_buf() operations, because access to 8-bit data register must be 32-bit aligned. Support of hardware ECC calculation is not implemented (data correction is always done by software), since it requires a working DMA engine. The driver can be included to an SPL image. Signed-off-by: NVladimir Zapolskiy <vz@mleia.com> Acked-by: NScott Wood <scottwood@freescale.com> Tested-by: NSylvain Lemieux <slemieux@tycoint.com>
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由 Vladimir Zapolskiy 提交于
Some NAND controllers define custom functions to read data out, respect this in order to correctly support bad block handling in simple SPL NAND framework. NAND controller specific read_buf() is used even to read 1 byte in case of connected 8-bit NAND device, it turns out that read_byte() may become outdated. Signed-off-by: NVladimir Zapolskiy <vz@mleia.com> Cc: Tom Rini <trini@konsulko.com> Cc: Tom Warren <twarren@nvidia.com> Acked-by: NScott Wood <scottwood@freescale.com>
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由 Rob Herring 提交于
If a dtb is specified on the command-line, the Android boot image ramdisk will not be found. Fix this so that we can specify the ramdisk address and dtb address. The syntax is to enter the Android boot image address for both the kernel and ramdisk. Signed-off-by: NRob Herring <robh@kernel.org>
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由 Mark Tomlinson 提交于
When building the file system the existing code does an insertion into a linked list. It attempts to speed this up by keeping a pointer to where the last entry was inserted but it's still slow. Now the nodes are just inserted into the list without searching through for the correct place. This unsorted list is then sorted once using mergesort after all the entries have been added to the list. This speeds up the scanning of the flash file system considerably. Signed-off-by: NMark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
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由 Mark Tomlinson 提交于
If a sector has a CLEANMARKER at the beginning, it indicates that the entire sector has been erased. Therefore, if this is found, we can skip the entire block. This was not being done before this patch. The code now does the same as the kernel does when encountering a CLEANMARKER. It still checks that the next few words are FFFFFFFF, and if so, the block is assumed to be empty, and so is skipped. Signed-off-by: NMark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
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由 Mark Tomlinson 提交于
The scan code is similar to the linux kernel, but the kernel defines a much smaller size to scan through before deciding a sector is blank. Assuming that what is in the kernel is OK, make these two match. On its own, this change makes no difference to scanning of any sectors which have a clean marker at the beginning, since the entire sector is not blank. Signed-off-by: NMark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
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由 Mark Tomlinson 提交于
If the flash is slow, reading less from the flash into buffers makes the process faster. Signed-off-by: NMark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
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由 Mark Tomlinson 提交于
jffs2_1pass_read_inode() would read the entire data for each node in the filesystem, regardless of whether it was part of the file to be loaded or not. By only reading the header data for an inode, and then reading the data only when it is found to be part of the file to be loaded, much copying of data is saved. jffs2_1pass_list_inodes() read each inode for every file in the directory into a buffer. By using NULL as a buffer pointer, NOR flash simply returns a pointer, and therefore avoids a memory copy. Signed-off-by: NMark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
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由 Mark Tomlinson 提交于
If multiple versions of a file exist, only the most recent version should be used. The scheme to write 0 for the inode in older versions did not work, since this would have required writing to flash. The only time this caused an issue was listing a directory, where older versions of the file would still be seen. Since the directory entries are sorted, just look at the next entry in the list, and if it's the same move to that entry instead. Signed-off-by: NMark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
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由 Mark Tomlinson 提交于
Copying complete nodes from flash can be slow if the flash is slow to read. By only reading the data needed, the sorting operation can be made much faster. The directory entry comparison function also had a two bugs. First, it did not ensure the name was copied, so the name comparison may have been faulty (although it would have worked with NOR flash). Second, setting the ino to zero to ignore the entry did not work, since this was either writing to a temporary buffer, or (for NOR flash) directly to flash. Either way, the change was not remembered. Signed-off-by: NMark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
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由 Mark Tomlinson 提交于
If a destination is not provided, jffs2_1pass_read_inode() only returns the length of the file. In this case, avoid reading all the data nodes, and return as soon as the length of the file is known. Signed-off-by: NMark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
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由 Jiandong Zheng 提交于
Enable BCM SF2 ethernet and PHY for BCM Cygnus SoC Signed-off-by: NJiandong Zheng <jdzheng@broadcom.com> Signed-off-by: NSteve Rae <srae@broadcom.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Heiko Schocher 提交于
add support for the at91sam9260 based board smartweb from siemens. SPL is used without serial support, as this SoC has only 4k sram for running SPL. Here a U-Boot bootlog: RomBOOT > U-Boot 2015.07-rc2-00109-g4ae828c (Jun 15 2015 - 09:31:16 +0200) CPU: AT91SAM9260 Crystal frequency: 18.432 MHz CPU clock : 198.656 MHz Master clock : 99.328 MHz Watchdog enabled DRAM: 64 MiB WARNING: Caches not enabled NAND: 256 MiB In: serial Out: serial Err: serial Net: macb0 Hit any key to stop autoboot: 0 U-Boot> Signed-off-by: NHeiko Schocher <hs@denx.de>
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由 Heiko Schocher 提交于
remove unneeded udelay() in this function, as we use the dev_ready pin. Signed-off-by: NHeiko Schocher <hs@denx.de> Acked-by: NScott Wood <scottwood@freescale.com>
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由 Heiko Schocher 提交于
This patch enables building SPL without CONFIG_SPL_SERIAL_SUPPORT support. Signed-off-by: NHeiko Schocher <hs@denx.de> [trini: Ensure we build arch/arm/imx-common on mx28] Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Dennis Gilmore 提交于
remove options defined in the distro defaults add distro bot commands set scriptaddr value Signed-off-by: NDennis Gilmore <dennis@ausil.us>
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由 Dennis Gilmore 提交于
Signed-off-by: NDennis Gilmore <dennis@ausil.us>
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由 Dennis Gilmore 提交于
PXE: if a board has set its own value for CONFIG_BOOTP_VCI_STRING do not set the default one. Use the board set value instead Signed-off-by: NDennis Gilmore <dennis@ausil.us>
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由 Rob Herring 提交于
On the highbank platform the SoC's management controller firmware will probe the DRAM modules and populates the initial device tree with the correct values. Therefore the memory sizes in the DT are already correct, so remove U-Boot's DRAM bank setup so the memory node is not "fixed up" by u-boot. Signed-off-by: NRob Herring <robh@kernel.org> Signed-off-by: NAndre Przywara <osp@andrep.de>
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- 12 8月, 2015 8 次提交
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由 Simon Glass 提交于
These were pointed out in review but I missed them. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Peng Fan 提交于
The return type of pmic_read and pmic_write is signed int, so correct variable 'ret' from type unsigned int to int. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Simon Glass <sjg@chromium.org> Cc: Przemyslaw Marczak <p.marczak@samsung.com>
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由 Peng Fan 提交于
If enable DM PMIC and REGULATOR, we should not use original power framework. So need to comment out the pfuze code for original power framework, when CONFIG_DM_PMIC_PFUZE100 defined. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Peng Fan 提交于
1. Add new regulator driver pfuze100. * Introduce struct pfuze100_regulator_desc for maintaining info for one regulator. 2. Add new Kconfig entry DM_REGULATOR_PFUZE100 for pfuze100. 3. This driver intends to support PF100, PF200 and PF3000. 4. Add related macro definition in pfuze header file. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org>
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由 Peng Fan 提交于
1. Support driver model for pfuze100. 2. Introduce a new Kconfig entry DM_PMIC_PFUZE100 for pfuze100 3. This driver intends to support PF100, PF200 and PF3000, so add the device id into the udevice_id array. 4. Rename PMIC_NUM_OF_REGS macro to PFUZE100_NUM_OF_REGS. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Peng Fan 提交于
We do not need that "regulator-name" property must be provided in dts. If "regulator-name" property is not provided in dts, node name will chosen for settings '.name' field of uc_pdata. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org>
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由 Peng Fan 提交于
If there is no property named 'regulator-name' for regulators, choose node name instead, but not directly return failure value. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org>
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由 Peng Fan 提交于
According to datasheet, SWBST_MODE starts from bit 2 and it occupies 2 bits. So SWBST_MODE_MASK should be 0xC, and SWBST_MODE_xx should be ([mode] << 2). Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 10 8月, 2015 2 次提交
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由 Hans de Goede 提交于
Currently the serial code assumes that there is always at least one serial port (and panics / crashes due to null pointer dereferences when there is none). This makes it impossible to use u-boot on boards where there is no (debug) serial port, because e.g. all uart pins are muxed to another function. This commit adds a CONFIG_REQUIRE_SERIAL_CONSOLE Kconfig option, which defaults to y (preserving existing behavior), which can be set to n on such boards to make them work. This commit only implements this for CONFIG_DM_SERIAL=y configs, as allowing running without a serial port for CONFIG_DM_SERIAL=n configs is non trivial, and is not necessary at this moment. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NSimon Glass <sjg@chromium.org>
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- 09 8月, 2015 1 次提交
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- 08 8月, 2015 7 次提交
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由 Hans de Goede 提交于
Add composite video out support. This only gets enabled on the Mele M3 for now, since that is were it was tested. It will be enabled on more boards after testing. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
Add support for interlaced modes, this is a preparation patch for adding composite out support. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
Add a few extra sunxi display registers and constant defines. Also rename some existing defines (e.g. dropping _GCTRL) and make some more generic (e.g. dropping the 2x scaling from SUNXI_LCDC_TCON1_TIMING_V_TOTAL). This is a preparation patch for adding composite video out support. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
We should only subtract 2 from the vblank time when using tcon1. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
All the #ifdef-ery in selecting the default and fallback monitor type is becoming unyielding and makes the code hard to read, replace it with a few helper functions. This will also be useful with the upcoming CHIP board which has display adapter daughterboards which should be runtime detectable. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
The Jesurun Q5 has the musb hooked up to an usb-a receptacle, enable it in host-only mode. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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由 Hans de Goede 提交于
Do not add a bogus (pointing to a non existing serial port) stdout-path alias to dts on boards without a serial port. Note that we still define CONS_INDEX as this is used by the SPL where we do not use DM_SERIAL and thus CONFIG_REQUIRE_SERIAL_CONSOLE is not honored. We are getting away with this because the sun5i die actually has an uart0, which in the A13 package is not routed to the outside, so we are simply sending SPL bootup messages to the tx pin at the edge of the die, and they go no further from there... And sofar we only have one A13 board which does not have a serial port, all others do have a serial port. This kinda makes sense since the A13 is a much lower pincount package compared to all the other sunxi SoCs. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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