1. 30 9月, 2011 5 次提交
    • T
      powerpc/85xx: relocate CCSR before creating the initial RAM area · 6ca88b09
      Timur Tabi 提交于
      Before main memory (DDR) is initialized, the on-chip L1 cache is used as a
      memory area for the stack and the global data (gd_t) structure.  This is
      called the initial RAM area, or initram.  The L1 cache is locked and the TLBs
      point to a non-existent address (so that there's no chance it will overlap
      main memory or any device).  The L1 cache is also configured not to write
      out to memory or the L2 cache, so everything stays in the L1 cache.
      
      One of the things we might do while running out of initram is relocate CCSR.
      On reset, CCSR is typically located at some high 32-bit address, like
      0xfe000000, and this may not be the best place for CCSR.  For example, on
      36-bit systems, CCSR is relocated to 0xffe000000, near the top of 36-bit
      memory space.
      
      On some future Freescale SOCs, the L1 cache will be forced to write to the
      backing store, so we can no longer have the TLBs point to non-existent address.
      Instead, we will point the TLBs to an unused area in CCSR.  In order for this
      technique to work, CCSR needs to be relocated before the initram memory is
      enabled.
      
      Unlike the original CCSR relocation code in cpu_init_early_f(), the TLBs
      we create now for relocating CCSR are deleted after the relocation is finished.
      cpu_init_early_f() will still need to create a TLB for CCSR (at the new
      location) for normal U-Boot purposes.  This is done to keep the impact to
      existing U-Boot code minimal and to better isolate the CCSR relocation code.
      Signed-off-by: NTimur Tabi <timur@freescale.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      6ca88b09
    • T
      powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros · e46fedfe
      Timur Tabi 提交于
      Introduce the CONFIG_SYS_CCSRBAR_PHYS_HIGH and CONFIG_SYS_CCSRBAR_PHYS_LOW
      macros, which contain the high and low portions of CONFIG_SYS_CCSRBAR_PHYS.
      This is necessary for the assembly-language code that relocates CCSR, since
      the assembler does not understand 64-bit constants.
      
      CONFIG_SYS_CCSRBAR_PHYS is automatically defined from the
      CONFIG_SYS_CCSRBAR_PHYS_HIGH and CONFIG_SYS_CCSRBAR_PHYS_LOW macros, so it
      should not be defined in a board header file.  Similarly,
      CONFIG_SYS_CCSRBAR_DEFAULT is defined for each SOC in config_mpc85xx.h, so
      it should also not be defined in the board header file.
      
      CONFIG_SYS_CCSR_DO_NOT_RELOCATE is a "short-cut" macro that guarantees that
      CONFIG_SYS_CCSRBAR_PHYS is set to the same value as CONFIG_SYS_CCSRBAR_DEFAULT,
      and so CCSR will not be relocated.
      
      Since CONFIG_SYS_CCSRBAR_DEFAULT is locked to a fixed value, multi-stage U-Boot
      builds (e.g. NAND) are required to relocate CCSR only during the last stage
      (i.e. the "real" U-Boot).  All other stages should define
      CONFIG_SYS_CCSR_DO_NOT_RELOCATE to ensure that CCSR is not relocated.
      
      README is updated with descriptions of all the CONFIG_SYS_CCSRBAR_xxx macros.
      Signed-off-by: NTimur Tabi <timur@freescale.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      e46fedfe
    • K
    • R
      powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014 · 1b719e66
      Ramneek Mehresh 提交于
      Add UTMI and ULPI PHY support for USB controller on qoriq series of
      processors with internal UTMI PHY implemented, for example P1010/P1014
       - Use both getenv() and hwconfig to get USB phy type till getenv()
         is depricated
       - Introduce CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY to specify if soc
         has internal UTMI phy
      Signed-off-by: NRamneek Mehresh <ramneek.mehresh@freescale.com>
      Acked-by: NRemy Bohmer <linux@bohmer.net>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      1b719e66
    • W
      Prepare v2011.09 · 1d5e7fb4
      Wolfgang Denk 提交于
      Signed-off-by: NWolfgang Denk <wd@denx.de>
      1d5e7fb4
  2. 29 9月, 2011 4 次提交
  3. 27 9月, 2011 1 次提交
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  7. 20 9月, 2011 2 次提交
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  11. 12 9月, 2011 7 次提交