- 25 4月, 2017 1 次提交
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由 Dalon Westergreen 提交于
Add support for the Terasic DE10-Nano board. The board is based on the DE0-Nano-Soc board but adds a larger FPGA and an HDMI output. Signed-off-by: NDalon Westergreen <dwesterg@gmail.com> Reviewed-by: NDinh Nguyen <dinguyen@kernel.org>
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- 14 4月, 2017 2 次提交
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由 Ley Foon Tan 提交于
Convert Altera DDR SDRAM driver to use Kconfig method. Enable ALTERA_SDRAM by default if it is on Gen5 target. Arria 10 will have different driver. Signed-off-by: NTien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>
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由 Marek Vasut 提交于
The board is now manufactured by Aries Embedded GmbH , rename it. Signed-off-by: NMarek Vasut <marex@denx.de>
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- 18 2月, 2017 1 次提交
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由 Dalon Westergreen 提交于
the socfpga bootrom supports mmc booting from either a raw image starting at 0x0, or from a partition of type 0xa2. This patch adds support for locating the boot image in the first type 0xa2 partition found. Assigned a partition number of -1 will cause a search for a partition of type CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE and use it to find the u-boot image Signed-off-by: NDalon Westergreen <dwesterg@gmail.com>
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- 24 1月, 2017 1 次提交
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由 Tom Rini 提交于
This option should not really be user selectable. Note that on PowerPC we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be conditional on that. Signed-off-by: NTom Rini <trini@konsulko.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)
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- 06 12月, 2016 1 次提交
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由 Anatolij Gustschin 提交于
Add CycloneV based Terasic DE1-SoC board. The board boots from SD/MMC. Ethernet and USB host is supported. Signed-off-by: NAnatolij Gustschin <agust@denx.de> Cc: Marek Vasut <marex@denx.de>
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- 17 9月, 2016 9 次提交
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由 Simon Glass 提交于
Move this option to Kconfig and tidy up existing uses. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Move this option to Kconfig and tidy up existing uses. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Move this option to Kconfig and tidy up existing uses. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Move this option to Kconfig and tidy up existing uses. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Move this option to Kconfig and tidy up existing uses. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Move this option to Kconfig and tidy up existing uses. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Move this option to Kconfig and tidy up existing uses. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Move this option to Kconfig and tidy up existing uses. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Move this option to Kconfig and tidy up existing uses. Signed-off-by: NSimon Glass <sjg@chromium.org>
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- 08 6月, 2016 2 次提交
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由 Marek Vasut 提交于
Just sort the board entries, no functional change. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
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由 Pavel Machek 提交于
This adds support for IS1 board. Pretty usual socfpga board, 256MB of RAM, does not have MMC, two SPI chips, one ethernet port, two additional ethernet ports connected to the FPGA. Signed-off-by: NPavel Machek <pavel@denx.de>
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- 02 6月, 2016 1 次提交
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由 Marek Vasut 提交于
Add support for board based on the popular Altera Cyclone V SoC. This board has the following properties: - 1 GiB of DRAM - 1 Gigabit ethernet - 1 USB gadget port - 1 USB host port with an on-board hub - 2 QSPI NORs connected to the Cadence QSPI core - Multiple I2C EEPROMs and one I2C temperature sensor Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com> --- V2: Update the defconfig as per Tom's request
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- 20 12月, 2015 1 次提交
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由 Dinh Nguyen 提交于
In order to re-use as much Cyclone5 and Arria5 code as possible to support the Arria10 platform, we need to wrap some of the code with #ifdef's. By adding CONFIG_TARGET_SOCFPGA_GEN5, we can shorten the check by not having to check for both AV || AV. Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com>
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- 07 12月, 2015 1 次提交
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由 Stefan Roese 提交于
The SR1500 board is a CycloneV based board, similar to the EBV SoCrates, equipped with the following devices: - SPI NOR - eMMC - Ethernet Signed-off-by: NStefan Roese <sr@denx.de> Reviewed-by: NMarek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: NPavel Machek <pavel@denx.de>
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- 30 11月, 2015 1 次提交
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由 Marek Vasut 提交于
This board was constantly parasiting on the CV SoCDK, so split it into it's own separate directory. Moreover, the board config was missing important bits, like simple-bus support in SPL, the DRAM configuration was incorrect and the DTS was also missing the pre reloc bits. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Jan Viktorin <viktorin@rehivetech.com>
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- 23 9月, 2015 1 次提交
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由 Dinh Nguyen 提交于
Rename the socfpga_cyclone5.h to socfpga_cyclone5_socdk.h, and socfpga_arria.h to socfpga_arria5_socdk.h. This matches the other SoCFPGA board config files. Suggested-by: NMarek Vasut <marex@denx.de> Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com>
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- 04 9月, 2015 3 次提交
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由 Dinh Nguyen 提交于
Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV based board. The board can boot from SD/MMC. Ethernet is also supported. Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com>
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由 Marek Vasut 提交于
Add support for DENX MCV SoM, which is CycloneV based and the associated DENX MCVEVK baseboard. The board can boot from eMMC. Ethernet and USB is supported. Signed-off-by: NMarek Vasut <marex@denx.de>
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由 Marek Vasut 提交于
Add support for Terasic SoCkit, which is CycloneV based board. The board can boot either from SD/MMC or QSPI. Ethernet is also supported. Signed-off-by: NMarek Vasut <marex@denx.de>
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- 23 8月, 2015 2 次提交
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由 Marek Vasut 提交于
The board/altera/socfpga directory is not a generic SoCFPGA machine anymore, but instead it represents the Altera SoCDK board. To make matters more complicated, it represents both CycloneV and ArriaV variant. On the other hand, nowadays, the content of this board directory is mostly comprised of QTS-generated header files, while all the generic code is in arch/arm/mach-socfpga already. Thus, this patch splits the board/altera/socfpga into a separate board directory for ArriaV SoCDK and CycloneV SoCDK, so that each can be populated with the correct QTS-generated header files for that particular board. Signed-off-by: NMarek Vasut <marex@denx.de>
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由 Marek Vasut 提交于
The CONFIG_TARGET_SOCFPGA_CYCLONE5 and CONFIG_TARGET_SOCFPGA_ARRIA5 selected both a board and a CPU. This is not correct as these macros are supposed to select only board. All would be good, if QTS-generated header files didn't check for these macros exactly to determine if the platform is Cyclone V or Arria V. Thus, for the sake of compatibility with not well fleshed out header file generator, this patch makes these two macros into a stub config option and introduces new CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK and CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK targets, which select the previous stub config option. The result is that compatibility with QTS is preserved and the new CONFIG_TARGET_* select actual target boards. Signed-off-by: NMarek Vasut <marex@denx.de>
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- 13 5月, 2015 1 次提交
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由 Joe Hershberger 提交于
By making the board selections optional, every defconfig will include the board selection when running savedefconfig so if a new board is added to the top of the list of choices the former top's defconfig will still be correct. Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Cc: Tom Rini <trini@konsulko.com>
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- 07 5月, 2015 1 次提交
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由 Masahiro Yamada 提交于
Switch to a more standard way of board select; put the SoC select into arch/arm/Kconfig and move the board select menu under arch/arm/mach-socfpga/Kconfig. Also, consolidate SYS_BOARD, SYS_VENDOR, SYS_SOC, SYS_CONFIG_NAME. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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