- 15 6月, 2009 2 次提交
-
-
由 Wolfgang Denk 提交于
Update CHANGELOG, fix minor coding stylke issue. Update Makefile. Signed-off-by: NWolfgang Denk <wd@denx.de>
-
由 Wolfgang Denk 提交于
This reverts commit ca9c8a1e, which causes compile warnings ("large integer implicitly truncated to unsigned type") on all systems that use this driver. The warning results from passing long constants (TX_CFG, RX_CFG) into smc911x_set_mac_csr() which is declared to accept "unsigned character" arguments only. Being close to a release, with nobody available to actually test the code or the suggested fixes, it seems better to revert the patch.
-
- 12 6月, 2009 8 次提交
-
-
由 Kumar Gala 提交于
The ddr code computes most things as 64-bit quantities and had some places in the middle that it was using phy_addr_t and phys_size_t. Instead we use unsigned long long through out and only at the last stage of setting the LAWs and reporting the amount of memory to the board code do we truncate down to what we can cover via phys_size_t. This has the added benefit that the DDR controller itself is always setup the same way regardless of how much memory we have. Its only the LAW setup that limits what is visible to the system. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Kumar Gala 提交于
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Haiying Wang 提交于
Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Haiying Wang 提交于
MPC8569 UART1 signals are muxed with PortF bit[9-12], we need to define those pins before using UART1. Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Haiying Wang 提交于
Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com> Signed-off-by: NYu Liu <Yu.Liu@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Haiying Wang 提交于
- Increase the size of malloc to 512KB because MPC8569MDS needs more memory for malloc to support up to eight Ethernet interfaces. - Move Environment address out of uboot thus the saved environment variables will not be erased after u-boot is re-programmed. Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Haiying Wang 提交于
MPC8569 has 128K bytes MURAM. Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
-
- 10 6月, 2009 14 次提交
-
-
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
-
由 Shinya Kuribayashi 提交于
Signed-off-by: NShinya Kuribayashi <skuribay@pobox.com>
-
由 Wolfgang Denk 提交于
Update CHANGELOG Signed-off-by: NWolfgang Denk <wd@denx.de>
-
由 Wolfgang Denk 提交于
Signed-off-by: NWolfgang Denk <wd@denx.de>
-
由 Daniel Mack 提交于
In do_readpage(), don't free 'dn' if its allocation failed. Signed-off-by: NDaniel Mack <daniel@caiaq.de>
-
由 Wolfgang Denk 提交于
Signed-off-by: NWolfgang Denk <wd@denx.de> Tested-by: NMikhail Zaturenskiy <mzaturenskiy@shoppertrak.com>
-
由 Wolfgang Denk 提交于
Remove "saveenv" from "update" definition: the environment is outside the U-Boot image on TQM85xx and therefor not affected by updates. Also "beautify" code a bit (vertical alignment). Signed-off-by: NWolfgang Denk <wd@denx.de>
-
由 Wolfgang Denk 提交于
Old TQM85xx boards had 'M' type Spansion Flashes from the S29GLxxxM series while new boards have 'N' type Flashes from the S29GLxxxN series, which have bigger sectors: 2 x 128 instead of 2 x 64 KB. We now change the configuration to the new flash types for all boards; this also works on old boards - we just waste two flash sectors for the environment which could be smaller there. Signed-off-by: NWolfgang Denk <wd@denx.de>
-
由 Dave Liu 提交于
The SYS_CLK_IN of MPC8569MDS is 66.66MHz, The DDR_CLK_IN is same with SYS_CLK_IN in 8569 processor. so, change the SYS_CLK_IN from 66MHz to 66.66MHz. Signed-off-by: NDave Liu <daveliu@freescale.com>
-
由 Dave Liu 提交于
The BCSR17[7] = 1 will unlock the write protect of FLASH. The WP# pin only controls the write protect of top/bottom sector, That is why we can save env, but we can't write the first sector before the patch. Signed-off-by: NDave Liu <daveliu@freescale.com>
-
由 Fredrik Arnerup 提交于
The MAXSIZE field in the TLB1CFG register is 4 bits, not 8 bits. This made setup_ddr_tlbs() try to set up a TLB larger than the e500 maximum (256 MB) which made u-boot hang in board_init_f() when trying to create a new stack in RAM. I have an mpc8540 with one 1GB dimm. Signed-off-by: NFredrik Arnerup <fredrik.arnerup@edgeware.tv> Signed-off-by: NAndy Fleming <afleming@freescale.com> Acked-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Dave Liu 提交于
Currently the clk_adj is 6 (3/4 cycle), The settings will cause the DDR controller hang at the data init. Change the clk_adj from 6 to 4 (1/2 cycle), make the memory system stable. Signed-off-by: NDave Liu <daveliu@freescale.com>
-
-
由 RONETIX - Ilko Iliev 提交于
This patch corrects the missing PLLB initialization in usb_cpu_init() for AT91SAM9261. Because of the missing PLLB initialization, the USB support for all AT91SAM9261 based boards will work only if the PLLB is configured by a precedent bootloader. Signed-off-by: NIlko Iliev <iliev@ronetix.at> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NRemy Bohmer <linux@bohmer.net>
-
- 09 6月, 2009 4 次提交
-
-
由 Felix Radensky 提交于
This patch fixes MDIO clock setup in case when OPB frequency is 100MHz. Current code assumes that the value of sysinfo.freqOPB is 100000000 when OPB frequency is 100MHz. In reality it is 100000001. As a result MDIO clock is set to incorrect value, larger than 2.5MHz, thus violating the standard. This in not a problem on boards equipped with Marvell PHYs (e.g. Canyonlands), since those PHYs support MDIO clocks up to 8.3MHz, but can be a problem for other PHYs (e.g. Realtek ones). Signed-off-by: NFelix Radensky <felix@embedded-sol.com> Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
-
由 Yoshihiro Shimoda 提交于
When PCI device use system memory, some PCI host controller should be set physical memory address. Signed-off-by: NYoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
-
由 Manikandan Pillai 提交于
eth_halt() function in the smc911x drivers used to call the smc911x_reset() function. eth_halt() used to be called after tftp transfers. This used to put the ethernet chip in reset while the linux boots up resulting in the ethernet driver not coming up. NFS boot used to fail as a result. This patch calls smc911x_shutdown() instead of smc911x_reset(). Some comments received has also been fixed. Signed-off-by: NManikandan Pillai <mani.pillai@ti.com> Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
-
由 Remy Bohmer 提交于
Some boards do not have SROM support for the DM9000 network adapter. Instead of listing these board names in the driver code, make this option configurable from the board config file. It also removes a build warning for the at91sam9261ek board: 'dm9000x.c:545: warning: 'read_srom_word' defined but not used' And it repaires the trizepsiv board build which was broken around the same routines Signed-off-by: NRemy Bohmer <linux@bohmer.net> Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
-
- 08 6月, 2009 2 次提交
-
-
由 Kim Phillips 提交于
In GMII mode (which operates at 3.3V) both SICRH TSEC1/2 output buffer impedance bits should be clear, i.e., SICRH[TSIOB1] = 0 and SICRH[TSIOB2] = 0. SICRH[TSIOB1] was erroneously being set high. U-Boot always operated this PHY interface in GMII mode. It is assumed this was missed in the clean up by the original board porters, and copied along to the TQM and sbc boards. Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Acked-by: NIra Snyder <iws@ovro.caltech.edu> Reviewed-by: NDavid Hawkins <dwh@ovro.caltech.edu> Tested-by: NPaul Gortmaker <paul.gortmaker@windriver.com> CC: Dave Liu <DaveLiu@freescale.com>
-
由 Daniel Mack 提交于
If the MAX address is given by the environment, write it back to the hardware. Signed-off-by: NDaniel Mack <daniel@caiaq.de> Cc: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
-
- 04 6月, 2009 4 次提交
-
-
-
由 Wolfgang Denk 提交于
Several boards used different ways to specify the size of the protected area when enabling flash write protection for the sectors holding the environment variables: some used CONFIG_ENV_SIZE and CONFIG_ENV_SIZE_REDUND, some used CONFIG_ENV_SECT_SIZE, and some even a mix of both for the "normal" and the "redundant" areas. Normally, this makes no difference at all. However, things are different when you have to deal with boards that can come with different types of flash chips, which may have different sector sizes. Here we may have to chose CONFIG_ENV_SECT_SIZE such that it fits the biggest sector size, which may include several sectors on boards using the smaller sector flash types. In such a case, using CONFIG_ENV_SIZE or CONFIG_ENV_SIZE_REDUND to enable the protection may lead to the case that only the first of these sectors get protected, while the following ones aren't. This is no real problem, but it can be confusing for the user - especially on boards that use CONFIG_ENV_SECT_SIZE to protect the "normal" areas, while using CONFIG_ENV_SIZE_REDUND for the "redundant" area. To avoid such inconsistencies, I changed all sucn boards that I found to consistently use CONFIG_ENV_SECT_SIZE for protection. This should not cause any functional changes to the code. Signed-off-by: NWolfgang Denk <wd@denx.de> Cc: Paul Ruhland Cc: Pantelis Antoniou <panto@intracom.gr> Cc: Stefan Roese <sr@denx.de> Cc: Gary Jennejohn <garyj@denx.de> Cc: Dave Ellis <DGE@sixnetio.com> Acked-by: NStefan Roese <sr@denx.de>
-
由 Ilya Yanok 提交于
Return value of mmc_send_if_cond() can be safely ignored (as it is done in Linux). This makes older cards work with MXC MCI controller. Signed-off-by: NIlya Yanok <yanok@emcraft.com>
-
由 Stefan Roese 提交于
This patch now enabled this cfi-mtd wrapper to correctly detect and erase the last sector in an NOR FLASH device. Signed-off-by: NStefan Roese <sr@denx.de>
-
- 03 6月, 2009 6 次提交
-
-
由 Yauhen Kharuzhy 提交于
SCR & switch data are read from card as big-endian words and should be converted to CPU byte order. Signed-off-by: NYauhen Kharuzhy <jekhor@gmail.com> Signed-off-by: NAndy Fleming <afleming@freescale.com>
-
由 Yauhen Kharuzhy 提交于
Cards which are not compatible with SD 2.0 standard, may return response for CMD8 command, but it will be invalid in terms of SD 2.0. We should accept this case as admissible, just like Linux does. Signed-off-by: NYauhen Kharuzhy <jekhor@gmail.com> Signed-off-by: NAndy Fleming <afleming@freescale.com>
-
由 Rabin Vincent 提交于
Now that response is a uint, we can drop all the casts. Signed-off-by: NRabin Vincent <rabin@rab.in>
-
由 Rabin Vincent 提交于
The mmc code defines the response as an array of chars. However, it access the response bytes both as (i) an array of four uints (with casts) and (ii) as individual chars. The former case is used more often, including by the driver when it assigns the response. The char-wise accesses are broken on little endian systems because they assume that the bytes in the uints are in big endian byte order. This patch fixes this by changing the response to be an array of four uints and replacing the char-wise accesses with equivalent uint-wise accesses. Signed-off-by: NRabin Vincent <rabin@rab.in>
-
由 Rabin Vincent 提交于
The generic MMC core uses direct long long divisions, which do not build with ARM EABI toolchains. Use lldiv() instead, which works everywhere. Signed-off-by: NRabin Vincent <rabin@rab.in>
-
由 Rabin Vincent 提交于
find_mmc_device returns NULL if an invalid device number is specified. Check for this to avoid dereferencing NULL pointers. Signed-off-by: NRabin Vincent <rabin@rab.in>
-