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  1. 19 10月, 2009 1 次提交
  3. 14 10月, 2009 1 次提交
  5. 13 10月, 2009 3 次提交
  7. 30 9月, 2009 2 次提交
    • M
      On-chip ROM boot: MPC8536DS support · e40ac487
      由 Mingkai Hu 提交于 
      The MPC8536E is capable of booting from the on-chip ROM - boot from
eSDHC and boot from eSPI. When power on, the porcessor excutes the
ROM code to initialize the eSPI/eSDHC controller, and loads the mian
U-Boot image from the memory device that interfaced to the controller,
such as the SDCard or SPI EEPROM, to the target memory, e.g. SDRAM or
L2SRAM, then boot from it.

The memory device should contain a specific data structure with control
word and config word at the fixed address. The config word direct the
process how to config the memory device, and the control word direct
the processor where to find the image on the memory device, or where
copy the main image to. The user can use any method to store the data
structure to the memory device, only if store it on the assigned address.

The on-chip ROM code will map the whole 4GB address space by setting
entry0 in the TLB1, so the main image need to switch to Address space 1
to disable this mapping and map the address space again.

This patch implements loading the mian U-Boot image into L2SRAM, so
the image can configure the system memory by using SPD EEPROM.
Signed-off-by: NMingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      e40ac487
    • M
      NAND boot: MPC8536DS support · 9a1a0aed
      由 Mingkai Hu 提交于 
      MPC8536E can support booting from NAND flash which uses the
image u-boot-nand.bin. This image contains two parts: a 4K
NAND loader and a main U-Boot image. The former is appended
to the latter to produce u-boot-nand.bin. The 4K NAND loader
includes the corresponding nand_spl directory, along with the
code twisted by CONFIG_NAND_SPL. The main U-Boot image just
like a general U-Boot image except the parts that included by
CONFIG_SYS_RAMBOOT.

When power on, eLBC will automatically load from bank 0 the
4K NAND loader into the FCM buffer RAM where CPU can execute
the boot code directly. In the first stage, the NAND loader
copies itself to RAM or L2SRAM to free up the FCM buffer RAM,
then loads the main image from NAND flash to RAM or L2SRAM
and boot from it.

This patch implements the NAND loader to load the main image
into L2SRAM, so the main image can configure the RAM by using
SPD EEPROM. In the first stage, the NAND loader copies itself
to the second to last 4K address space, and uses the last 4K
address space as the initial RAM for stack.

Obviously, the size of L2SRAM shouldn't be less than the size
of the image used. If so, the workaround is to generate another
image that includes the code to configure the RAM by SPD and
load it to L2SRAM first, then relocate the main image to RAM
to boot up.
Signed-off-by: NMingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      9a1a0aed
  9. 29 9月, 2009 1 次提交
  11. 26 9月, 2009 1 次提交
  13. 25 9月, 2009 6 次提交
  15. 14 9月, 2009 1 次提交
  17. 11 9月, 2009 3 次提交
  19. 05 9月, 2009 5 次提交
  21. 02 9月, 2009 4 次提交
  23. 01 9月, 2009 1 次提交
  25. 29 8月, 2009 6 次提交
  27. 25 8月, 2009 1 次提交
  29. 24 8月, 2009 1 次提交
    • M
      start a linker script helper file · 6ac9f479
      由 Mike Frysinger 提交于 
      Start a common header file for common linker script code (such as
workarounds for older linkers) rather than doing this in the build system.

As fallout, we no longer execute the linker every time config.mk is
included by a build file (which can easily be 70+ times), but rather only
execute it once.

This also fixes a bug in the major version checking by creating a macro to
easily compare versions and keep people from making the same common
mistake (forgetting to check major and minor together).
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
      6ac9f479
  31. 23 8月, 2009 1 次提交
  33. 22 8月, 2009 2 次提交
    • P
      mpc83xx: sbc8349 - make enabling PCI more user friendly · c0d660fb
      由 Paul Gortmaker 提交于 
      Prior to this commit, to enable PCI, you had to go manually
edit the board config header, which isn't really user friendly.
This adds the typical PCI make targets to the toplevel Makefile
in accordance with what is being done with other boards.
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
      c0d660fb
    • W
      Fix all linker scripts for older binutils versions (pre-2.16) · 1aada9cd
      由 Wolfgang Denk 提交于 
      Commit f62fb999 fixed handling of all rodata sections by using a
wildcard combined with calls to ld's builtin functions SORT_BY_ALIGNMENT()
and SORT_BY_NAME().  Unfortunately these functions were only
introduced with biunutils version 2.16, so the modification broke
building with all tool chains using older binutils.

This patch makes it work again.  This is done by omitting the use of
these functions for such old tool chains.  This will result in
slightly larger target binaries, as the rodata sections are no longer
in optimal order alignment-wise which reauls in unused gaps, but the
effect was found to be insignificant - especially compared to the fact
that you cannot build U-Boot at all in the current state.

As ld seems to have no support for conditionals we run the linker
script through the C preprocessor which can be easily used to remove
the unwanted function calls.

Note that the C preprocessor must be run with the "-ansi" (or a
"-std=") option to make sure all the system-specific predefined
macros outside the reserved namespace are suppressed. Otherise, cpp
might for example substitute "powerpc" to "1", thus corrupting for
example "OUTPUT_ARCH(powerpc)" etc.
Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
      1aada9cd