- 08 8月, 2017 8 次提交
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由 Stefan Roese 提交于
This defconfig uses the PCIe x4 binary blobs from the congatec BIOS. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Stefan Roese 提交于
- Disable debug UART - Enable more partition support Signed-off-by: NStefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Stefan Roese 提交于
- Enable ACPI resume support - Disable debug UART - Enable Spansion and Winbond SPI flash support - Move VGA BIOS binary address to enable bigger U-Boot images Signed-off-by: NStefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Stefan Roese 提交于
This patch adds the common header include file theadorable-x86-common.h for the theadorable-x86 targets to define all common options and the default environment. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Stefan Roese 提交于
This patch adds the infrastructure to define different config headers with different configurations and default environment for the baseboards that can now be selected via Kconfig. The new configuration for the theadorable-x86-conga-qa3-e3845 is also added. Also the new defconfig file for this new target is added. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Stefan Roese 提交于
This patch adds the infrastructure to define different config headers with different configurations and default environment for the baseboards that can now be selected via Kconfig. The new configuration for the theadorable-x86-dfi-bt700 is also added. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Bin Meng 提交于
When CONFIG_EFI_PARTITION is not set, the following build error is seen in arch/x86/lib/acpi_s3.c: error: expected declaration specifiers or '...' before '*' token static void asmlinkage (*acpi_do_wakeup)(void *vector) = (void*)WAKEUP_BASE; This is actually caused by missing asmlinkage declaration, but with CONFIG_EFI_PARTITION on, the declaration comes from part.h which is included from common.h. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Bin Meng 提交于
Neither new design uses ISA bus, nor does any U-Boot codes use these codes. Remove them. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 05 8月, 2017 17 次提交
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由 Thomas Petazzoni 提交于
The environment has pretty much nothing to do with just "PPC", so rename the macros to just __UBOOT_ENV_SECTION__ which is more readable. In addition, only a single macro is needed: the environment now goes either to the default section (USE_HOSTCC is defined) or in the .text section. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
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由 Thomas Petazzoni 提交于
CONFIG_SYS_USE_PPCENV is no longer used anywhere. It was used to put the environment in the special .ppcenv section, but the last architecture using this section (SuperH) has been changed to not use it. Therefore, this commit drops support for CONFIG_SYS_USE_PPCENV entirely. We only handle two cases: - We're building the host tool tools/envcrc, in which case the environment is place with no special section attribute (so it depends up in .data) - We're building U-Boot itself, in which case the environnement is placed in the .text section. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
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由 Adam Ford 提交于
This converts the following to Kconfig: CONFIG_SYS_TEXT_BASE The includes, whitelist, etc. were left for now but I don't get any build errors or warnings on the omap3_logic_defconfig or am3517_evm_defconfig builds I tried. Signed-off-by: NAdam Ford <aford173@gmail.com>
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由 Patrice Chotard 提交于
fix the following compilation error reported by buidlman: arm: + stm32f429-discovery +arch/arm/mach-stm32/stm32f4/soc.c: In function 'arch_cpu_init': +arch/arm/mach-stm32/stm32f4/soc.c:30:2: error: 'for' loop initial declarations are only allowed in C99 or C11 mode + for (int i = 0; i < ARRAY_SIZE(stm32_region_config); i++) + ^ +arch/arm/mach-stm32/stm32f4/soc.c:30:2: note: use option -std=c99, -std=gnu99, -std=c11 or -std=gnu11 to compile your code +make[3]: *** [arch/arm/mach-stm32/stm32f4/soc.o] Error 1 +make[2]: *** [arch/arm/mach-stm32/stm32f4] Error 2 +make[1]: *** [arch/arm/mach-stm32] Error 2 +make: *** [sub-make] Error 2 Signed-off-by: NPatrice Chotard <patrice.chotard@st.com> Acked-by: NVikas Manocha <vikas.manocha@st.com>
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Fix the UART input clock for the early debug UART, it should be 100MHz, instead of 88MHz. Signed-off-by: NWenyou Yang <wenyou.yang@microchip.com>
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Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: NWenyou Yang <wenyou.yang@microchip.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: NWenyou Yang <wenyou.yang@microchip.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: NWenyou Yang <wenyou.yang@microchip.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: NWenyou Yang <wenyou.yang@microchip.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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Update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: NWenyou Yang <wenyou.yang@microchip.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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To support driver model and device tree, use the SPI-flash-based AT45xxx DataFlash driver, DataFlash is a kind of SPI flash. Instead of ATMEL_DATAFLASH_SPI DataFlash older driver that will be removed in the future. Signed-off-by: NWenyou Yang <wenyou.yang@microchip.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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To support driver model and device tree, use the SPI-flash-based AT45xxx DataFlash driver, DataFlash is a kind of SPI flash. Instead of ATMEL_DATAFLASH_SPI DataFlash older driver that will be removed in the future. Signed-off-by: NWenyou Yang <wenyou.yang@microchip.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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To support driver model and device tree, use the SPI-flash-based AT45xxx DataFlash driver, DataFlash is a kind of SPI flash. Instead of ATMEL_DATAFLASH_SPI DataFlash older driver that will be removed in the future. Signed-off-by: NWenyou Yang <wenyou.yang@microchip.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by: NWenyou Yang <wenyou.yang@microchip.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Alison Chaiken 提交于
Strings read from devices may sometimes fail to be NULL-terminated. The functions in lib/string.c are subject to failure in this case. Protect against observed failures in set_gpt_info() by switching to length-checking variants with a length limit of the maximum possible partition table length. At the same time, add a few checks for NULL string pointers. Here is an example as observed in sandbox under GDB: => gpt verify host 0 $partitions Program received signal SIGSEGV, Segmentation fault. 0x0000000000477747 in strlen (s=0x0) at lib/string.c:267 267 for (sc = s; *sc != '\0'; ++sc) (gdb) bt #0 0x0000000000477747 in strlen (s=0x0) at lib/string.c:267 #1 0x00000000004140b2 in set_gpt_info (str_part=<optimized out>, str_disk_guid=str_disk_guid@entry=0x7fffffffdbe8, partitions=partitions@entry=0x7fffffffdbd8, parts_count=parts_count@entry=0x7fffffffdbcf "", dev_desc=<optimized out>) at cmd/gpt.c:415 #2 0x00000000004145b9 in gpt_verify (str_part=<optimized out>, blk_dev_desc=0x7fffef09a9d0) at cmd/gpt.c:580 #3 do_gpt (cmdtp=<optimized out>, flag=<optimized out>, argc=<optimized out>, argv=0x7fffef09a8f0) at cmd/gpt.c:783 #4 0x00000000004295b0 in cmd_call (argv=0x7fffef09a8f0, argc=0x5, flag=<optimized out>, cmdtp=0x714e20 <_u_boot_list_2_cmd_2_gpt>) at common/command.c:500 #5 cmd_process (flag=<optimized out>, argc=0x5, argv=0x7fffef09a8f0, repeatable=repeatable@entry=0x726c04 <flag_repeat>, ticks=ticks@entry=0x0) at common/command.c:539 Suggested-by: NLothar Waßmann <LW@karo-electronics.de> Signed-off-by: NAlison Chaiken <alison@peloton-tech.com>
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由 Alison Chaiken 提交于
This patch provides support in u-boot for renaming GPT partitions. The renaming is accomplished via new 'gpt swap' and 'gpt rename' commands. The 'swap' mode returns an error if no matching partition names are found, or if the number of partitions with one name does not equal the number with the second name. The 'rename' variant always succeeds as long as a partition with the provided number exists. Rewriting the partition table has the side-effect that all partitions end up with "msftdata" flag set. The reason is that partition type PARTITION_BASIC_DATA_GUID is hard-coded in the gpt_fill_pte() function. This does not appear to cause any harm. Signed-off-by: NAlison Chaiken <alison@peloton-tech.com>
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由 Alison Chaiken 提交于
Make the partition table available for modification by reading it from the user-specified device into a linked list. Provide an accessor function for command-line testing. Signed-off-by: NAlison Chaiken <alison@peloton-tech.com> [trini: Make this depend on CMD_GPT_RENAME, as it is the user of this code] Signed-off-by: NTom Rini <trini@konsulko.com>
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- 04 8月, 2017 10 次提交
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由 Alison Chaiken 提交于
In order to read the GPT, modify the partition name strings, and then write out a new GPT, the disk GUID is needed. While there is an existing accessor for the partition UUIDs, there is none yet for the disk GUID. Changes since v6: none. Signed-off-by: NAlison Chaiken <alison@peloton-tech.com>
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由 Alison Chaiken 提交于
Move MAX_SEARCH_PARTITIONS to part.h so that functions in cmd directory can find it. At the same time, increase the value to 64 since some operating systems use many, and the resources consumed by a larger value are minimal. Changes since v6: none. Signed-off-by: NAlison Chaiken <alison@peloton-tech.com>
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由 Alison Chaiken 提交于
Make minor changes to README.gpt and sandbox_defconfig to support testing of the gpt command's functionality in the sandbox. Changes since v6: none. Signed-off-by: NAlison Chaiken <alison@peloton-tech.com>
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由 Alison Chaiken 提交于
The existing partitions-list parsing in cmd/gpt.c passes a value from gpt_default() to set_gpt_info() that README.gpt suggests should begin with 'partitions='. Partition-list strings should in fact begin with 'uuid_disk', as otherwise the call from set_gpt_info() to extract_val() to find 'uuid_disk' will fail. Change README.gpt accordingly. Changes since v6: none. Signed-off-by: NAlison Chaiken <alison@peloton-tech.com>
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由 Alison Chaiken 提交于
Changes since v6: none. Signed-off-by: NAlison Chaiken <alison@peloton-tech.com>
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由 Alison Chaiken 提交于
Changes since v6: none. Signed-off-by: NAlison Chaiken <alison@peloton-tech.com>
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git://www.denx.de/git/u-boot-microblaze由 Tom Rini 提交于
Xilinx changes for v2017.09 Zynq: - Add Z-Turn board support fpga: - Remove intermediate buffer from code Zynqmp: - dts cleanup - change psu_init handling - Add options to get silicon version - Fix time handling - Map OCM/TCM via MMU - Add new clock driver
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由 Tom Rini 提交于
With the changes to fdt_get_base_address() we need to modify the logic in ft_verify_fdt() for how we check the validity of the CCSR address. Tested-on: qemu-ppce500 -M mpc8544ds Fixes: 336a4487 ("fdt: Correct fdt_get_base_address()") Cc: York Sun <york.sun@nxp.com> Cc: Wolfgang Denk <wd@denx.de> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Tom Rini 提交于
The logic of what fdt_get_base_address() will search for and return has changed. Rework get_phys_ccsrbar_addr_early() to perform the logic that fdt_get_base_address used to perform. Fixes: 336a4487 ("fdt: Correct fdt_get_base_address()") Reviewed-by: NSimon Glass <sjg@chromium.org> Cc: Alexander Graf <agraf@suse.de> Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Bin Meng 提交于
ahci_probe_scsi() now takes a 'base' argument, and there is an API that prepares base address for us: ahci_probe_scsi_pci(). Reported-by: NTom Rini <trini@konsulko.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
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- 03 8月, 2017 5 次提交
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由 Nobuhiro Iwamatsu 提交于
This updates defconfig of R-Car Gen3 to keep with the latest Kconfig. Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Add support for enabling and disabling the clock using the clock framework based on the content of OF instead of doing it manually in the board file. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: NJoe Hershberger <joe.hershberger@ni.com> Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
The order of parameters passed to the phy_connect() was wrong. Moreover, only PHY address 0 was used. Replace this with code capable of detecting the PHY address. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: NJoe Hershberger <joe.hershberger@ni.com> Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Add support for probing the RAVB Ethernet block from device tree. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: NJoe Hershberger <joe.hershberger@ni.com> Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
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