This commit adds some prototypes into include/mtd/cfi_flash.h.
These functions are defined with a weak attribute in
drivers/mtd/cfi_flash.c.
This means they can be overrided by board-specific ones
if necessary.

When defining such functions under board/ directory or
somewhere, cfi_flash.h should be included.
This makes sure that board-specfic cfi functions
are defined in a correct prototype.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NTom Rini <trini@ti.com>

CONFIG_SYS_FLASH_PROTECTION was active on most gdsys boards by default,
while hardware flash protection was not implemented.
Hardware support was added recently and we get into trouble because backward
compatibility is broken (u-boot can't unprotect the protected flash after a
downgrade). So we decided to disable hardware flash protection for all our boards.
Signed-off-by: NDirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: NStefan Roese <sr@denx.de>

OSD size was constant 32x16 characters.
Now the size is set as announced by the FPGA.
Signed-off-by: NDirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NDirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NDirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: NStefan Roese <sr@denx.de>

mclink is a serial interface for communication between gdsys FPGA.
Signed-off-by: NDirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: NStefan Roese <sr@denx.de>

A set of accessor functions was added to be able to access not only
memory mapped FPGA in a generic way.

Thanks to Wolfgang Denk for getting this sorted properly.
Signed-off-by: NDirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: NStefan Roese <sr@denx.de>

While the flash_detect_legacy() of drivers/mtd/cfi_flash.c
feed unmap_physmem() with MAP_NOCACHE as 2nd parameter,
the do_spi_flash_read_write() of common/cmd_sf.c
feed unmap_physmem() with the length of the mapped buffer
as 2nd parameter.

It's apparently a bug, and I personally think the 2nd parameter
should be the length of the mapped buffer.
Signed-off-by: NKuo-Jung Su <dantesu@faraday-tech.com>
CC: Albert Aribaud <albert.u.boot@aribaud.net>
CC: Stefan Roese <sr@denx.de>
Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NTom Rini <trini@ti.com>

Conflict over SPDX changes means that one change was effectively dropped
as it was fixing typos in a removed hunk of text.

Conflicts:
	arch/mips/cpu/mips64/start.S
Signed-off-by: NTom Rini <trini@ti.com>

Acked-by: NHeiko Schocher <hs@denx.de>
Signed-off-by: NTom Rini <trini@ti.com>

Some version of Andes core support FPU coprocessor,
if this is the case, and toolchain support FPU instruction set,
we should enable it at low level initialization time.
Signed-off-by: NKuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>

Signed-off-by: NTom Rini <trini@ti.com>

Signed-off-by: NKuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>

Synchronize the code with mips64/cache.S, in order to
allow further unifications.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>

Synchronize the code with mips64/cache.S, in order to
allow further unifications.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>

Synchronize the code with mips64/cache.S, in order to
allow further unifications.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>

Make it similar to the code in mips{32,64}/start.S, in order to
allow further unifications.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>

Synchronize the code with mips{32,64}/start.S, in order to
allow further unifications.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>

Synchronize the code with mips{32,64}/start.S, in order to
allow further unifications.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>

Synchronize the code with mips{32,64}/start.S, in order to
allow further unifications.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>

Synchronize the code with mips{32,64}/start.S, in order to
allow further unifications.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>

Make it similar to the code in mips64/start.S, in order to
allow further unifications.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>

Synchronize the code with mips64/start.S, in order to
allow further unifications.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>

The t4 register already holds the cache
line size, and the value of the register
is not changed in mips_init_icache.

Get the cache line size value from t4 for
mips_init_dcache as well and remove the
superfluous assignment of t5 register.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>

The MIPS  code uses centralized u-boot.lds script already,
and dynamic relocation is supported as well.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>

Nothing is used from asm/mipsregs.h.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>

Checking mips32/time.c with checkpatch.pl shows this:

  arch/mips/cpu/mips32/time.c:30: WARNING: line over 80 characters
  arch/mips/cpu/mips32/time.c:57: ERROR: return is not a function, parentheses are not required
  total: 1 errors, 1 warnings, 0 checks, 85 lines checked

Fix the code to make checkpatch.pl happy.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>

Qemu emulates a PCNET PCI card for the Malta CoreLV board.
Enable the pcnet driver and add board specific ethernet
initialization function to bring it up. Also enable the
CONFIG_CMD_NET and CONFIG_CMD_PING options.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>

Qemu emulates the Galileo GT64120 System Controller
which provides a CPU bus to PCI bus bridge.

The patch adds driver for this bridge and enables
PCI support for the emulated Malta board.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>

Move the GT64120 register base to 0x1be00000
and setup PCI BAR registers as done by the
original YAMON bootloader.

This is needed for running Linux kernel.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>

Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>

The MIPS Malta board has a SOFTRES register. Writing a
magic value into that register initiates a board reset.

Use this feature to implement reset support.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>

Add minimal support for the MIPS Malta CoreLV board
emulated by Qemu. The only supported peripherial is
the UART.

This is enough to boot U-Boot to the command prompt
both in little and big endian mode.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>

On the origial Malta boards the REVISION register is
accessible at the 0x1fc00010 address. The contents of
this register gives information about the revision
of the Malta and Core Boards.

This register is used by the Linux kernel to identify
the actual board it is running on. However the register
is not emulated properly by Qemu, so put a hardcoded
value into the flash to make Linux work.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>

The Linux specific register access macros, the
extern function declarations and the UL suffixes
has been removed.

The header file will be used for the qemu-malta
board.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>