Move this option to Kconfig and tidy up existing boards.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Kconfig options must defined in the defconfig files. Since RSA_SOFTWARE_EXP
relies on CONFIG_DM, unless it is set in kconfig we cannot enable RSA.
Remove the hacks which enable CONFIG_DM in header files and update the
defconfig.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Various boards have the wrong Kconfig ordering now. To avoid a misleading

diff in the next patch, reorder the configuration correctly.
Signed-off-by: NSimon Glass <sjg@chromium.org>

MIPS EL boards should define CONFIG_USE_PRIVATE_LIBGCC=y to work
with EB-only toolchains like the one from kernel.org. If one do
not globally set CONFIG_USE_PRIVATE_LIBGCC=y, the build fails with:

/opt/gcc-4.9.0-nolibc/mips-linux/bin/mips-linux-ld.bfd: /opt/gcc-4.9.0-nolibc/mips-linux/bin/../lib/gcc/mips-linux/4.9.0/libgcc.a(_lshrdi3.o): compiled for a big endian system and target is little endian
/opt/gcc-4.9.0-nolibc/mips-linux/bin/mips-linux-ld.bfd: /opt/gcc-4.9.0-nolibc/mips-linux/bin/../lib/gcc/mips-linux/4.9.0/libgcc.a(_lshrdi3.o): endianness incompatible with that of the selected emulation
/opt/gcc-4.9.0-nolibc/mips-linux/bin/mips-linux-ld.bfd: failed to merge target specific data of file /opt/gcc-4.9.0-nolibc/mips-linux/bin/../lib/gcc/mips-linux/4.9.0/libgcc.a(_lshrdi3.o)
/opt/gcc-4.9.0-nolibc/mips-linux/bin/mips-linux-ld.bfd: /opt/gcc-4.9.0-nolibc/mips-linux/bin/../lib/gcc/mips-linux/4.9.0/libgcc.a(_ashldi3.o): compiled for a big endian system and target is little endian
/opt/gcc-4.9.0-nolibc/mips-linux/bin/mips-linux-ld.bfd: /opt/gcc-4.9.0-nolibc/mips-linux/bin/../lib/gcc/mips-linux/4.9.0/libgcc.a(_ashldi3.o): endianness incompatible with that of the selected emulation
/opt/gcc-4.9.0-nolibc/mips-linux/bin/mips-linux-ld.bfd: failed to merge target specific data of file /opt/gcc-4.9.0-nolibc/mips-linux/bin/../lib/gcc/mips-linux/4.9.0/libgcc.a(_ashldi3.o)
/work/git-trees/u-boot-mips/Makefile:1171: recipe for target 'u-boot' failed

One example for a failing build is Travis CI.
Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: NPurna Chandra Mandal <purna.mandal@microchip.com>

- Add required UBI/UBIFS config definitions
- Add reasonable MTD partition layout
- Remove JFFS2 config definitions
- Drop some CFI verbage and definitions
- Make comment 'one-liners' truly one line
- Improve readability and content arrangement
Signed-off-by: NDerald D. Woods <woods.technical@gmail.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

This introduces some minor cleanups, regarding aspects such as board name, code
and headers organization as well as deprecated and missing config options.
Signed-off-by: NPaul Kocialkowski <contact@paulk.fr>
Reviewed-by: NTom Rini <trini@konsulko.com>

The chains of "depends on <SoC_name>" in the current Kconfig is
clumsy.  The idea here is to allow users to choose a SoC group first
(SoC group consists of some SoCs that can coexist in one binary).
Then, allow to enable/disable each SoC support in the selected SoC
group.  This makes the Kconfig menu clearer.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

PH1-Pro5 support and ProXstream2/PH1-LD6b support can coexist in one
image and there is bit more room in SPL to accommodate all of them.
Merge uniphier_pro5_defconfig into uniphier_pxs2_defconfig.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Enable the driver in all UniPhier defconfig files and add some
needed defines to the common files.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

This allows to use the "gpio" command.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: NSimon Glass <sjg@chromium.org>

Enable this so that tracing works with sandbox.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

This has got out of order: fix it.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Define prompt for cm-t43.

Cc: Tom Rini <trini@konsulko.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: NTom Rini <trini@konsulko.com>

Add full support for SPI flash chips to future-proof U-Boot for cm-t43.

Cc: Tom Rini <trini@konsulko.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: NTom Rini <trini@konsulko.com>

Move CONFIG_DM_SERIAL to cm_t43_defconfig. This forces us to update the
CONFIG_SYS_NS16550_REG_SIZE value for SPL.

Cc: Tom Rini <trini@konsulko.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: NTom Rini <trini@konsulko.com>

We drop everything possible things from board headerfiles and replace
this functionality with responsible settings in Kconfig (_defconfig).
Signed-off-by: NHannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: NTom Rini <trini@konsulko.com>

There is no need to have some specific prompt, so we drop this within
defconfigs.
Signed-off-by: NHannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: NTom Rini <trini@konsulko.com>

This patch adds support for stm32f7 family & stm32f746 board.
Signed-off-by: NVikas Manocha <vikas.manocha@st.com>

As QSPI and IFC are pin-multiplexed on LS1021A, only IFC is supported
in SD boot now. For the customer's demand, QSPI needs to be supported
in SD boot too.

This patch adds QSPI or IFC support in SD boot according to the
corresponding defconfig. For detail, ls1021aqds_sdcard_ifc_defconfig
is used to support IFC in SD boot and ls1021aqds_sdcard_qspi_defconfig
is used to support QSPI in SD boot.
Signed-off-by: NAlison Wang <alison.wang@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Convert ls1021aqds_nor_lpuart and ls1021aqds_ddr4_nor_lpuart
to driver model suport. Enable lpuart port driver.
Signed-off-by: NYork Sun <york.sun@nxp.com>
CC: Alison Wang <alison.wang@nxp.com>
CC: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NAlison Wang <alison.wang@nxp.com>

Add support for phy 1-3.
Signed-off-by: NJelle van der Waa <jelle@vdwaa.nl>
[hdegoede@redhat.com: use setclrbits_le32 instead of read-modify-write]
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

SY8106A is a PMIC which is used on the Allwinner
H3 Orange Pi Pc and Plus board. The VOUT1_SEL register is
implemented to set the default V-CPU voltage to 1200 mV.

This driver is required to ensure the SY8106A V-CPU
voltage is set to 1200 mV after a software reset. On cold
boot the default SY8106A output voltage is selected to be
1200 mV by a pair of resistors on the Orange Pi PC and Plus.
Signed-off-by: NJelle van der Waa <jelle@vdwaa.nl>
Tested-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

Split duart configuration as device tree file. Move /chosen node
out of board commone device tree. Convert ls1021aqds nor and SD
configurations to driver model support (qspi already uses DM).
Enable ns16550 DM serial driver for nor configurations.
Signed-off-by: NYork Sun <york.sun@nxp.com>
CC: Alison Wang <alison.wang@nxp.com>
CC: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NAlison Wang <alison.wang@nxp.com>

enable dma driver model for am437x_sk_evm as ti-edma3 supports
driver model
Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NJagan Teki <jteki@openedev.com>

Add Arasan SDHCI entry to Kconfig and fix all references.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

In current design, if any peripheral was assigned to both A7 and M4,
it will receive ipg_stop or ipg_wait when any of the 2 platforms
enter low power mode. We will have a risk that, if A7 enter wait,
M4 enter stop, peripheral will have chance to get ipg_stop and ipg_wait
asserted same time. Also if M4 enters stop mode, A7 will have no
chance to access the peripheral.
There are 26 peripherals affected by this IC issue:
SIM2(sim2/emvsim2)
SIM1(sim1/emvsim1)
UART1/UART2/UART3/UART4/UART5/UART6/UART7
SAI1/SAI2/SAI3
WDOG1/WDOG2/WDOG3/WDOG4
GPT1/GPT2/GPT3/GPT4
PWM1/PWM2/PWM3/PWM4
ENET1/ENET2
Software Workaround:
The solution is to set the peripherals to Domain0 by A core, since A core
in Domain0. The peripherals which will be used by M4, will be set to Domain1
by M4.
For example, A core set WDOG4 to domain0, but when M4 boots up, M4 will
set WDOG4 to domain1, because M4 will use WDOG4.

So the peripherals are not shared by them. This way requires
the uboot implemented the RDC driver and set the 26 IPs above
to domain 0 only. M4 image will set the M4 to domain 1 and
set peripheral which it will use to domain 1.

This patch enables the CONFIG_IMX_RDC and CONFIG_IMX_BOOTAUX for
i.MX7D SABRESD board, and setup the 26 IP resources to domain 0.
Signed-off-by: NYe.Li <ye.li@nxp.com>
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

This adds basic support to Intel Cougar Canyon 2 board, a board
based on Chief River platform with an Ivy Bridge processor and
a Panther Point chipset.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Acked-by: NSimon Glass <sjg@chromium.org>

ARC core could be configured with different L1 and L2 (AKA SLC) cache
line lengths. At least these values are possible and were really used:
32, 64 or 128 bytes.

Current implementation requires cache line to be selected upon U-Boot
configuration and then it will only work on matching hardware. Indeed
this is quite efficient because cache line length gets hardcoded during
code compilation. But OTOH it makes binary less portable.

With this commit we allow U-Boot to determine real L1 cache line length
early in runtime and use this value later on. This extends portability
of U-Boot binary a lot.
Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>

The Versatile Industrial Communication platform is a community oriented
board from Landis + Gyr. It comes with:
- an RS-485 port
- 2 Ethernet ports
- a wireless M-BUS
- a 4G modem
- a 4MB SPI flash
- a 4GB eMMC
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
[rebase on current TOT]
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

Add support for DENX MA5D4 SoM and MA5D4EVK board, based on the
Atmel SAMA5D4 SoC. The SoM contains the SoC, eMMC, SPI NOR, SPI
CAN controllers and DRAM, the baseboard contains UART connectors,
ethernet port, microSD slot, LCD header, 2x CAN connector and a
lot of expansion headers.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: NHeiko Schocher <hs@denx.de>
Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>

New features for smartweb:
* switch to hush command parser
* change autoboot stop to <ESC><ESC>
* allow to write ethaddr
Signed-off-by: NMatthias Michel <matthias.michel@siemens.com>
Reviewed-by: NSamuel Egli <samuel.egli@siemens.com>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>
Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>

Move this option to Kconfig and clean up the header files. Adjust the only
user (the LCD driver) to work with the new driver.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Move this driver over to use driver model. This involves rearranging the
code somewhat. The effect is that everything is run from the probe() method.

Boards which use this are fixed up, but only seaboard is tested.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NAnatolij Gustschin <agust@denx.de>
Signed-off-by: NTom Warren <twarren@nvidia.com>

This option refers only to the tegra20 video driver, so name it as such
to avoid confusion with tegra124.

Also move this option to Kconfig.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NAnatolij Gustschin <agust@denx.de>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Adjust the driver to use driver model. The SOR becomes a bridge device. We
use the normal simple_panel driver to handle the display itself. We also
need to enable some options such as regulators, PWMs and DM_VIDEO itself.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NAnatolij Gustschin <agust@denx.de>
Signed-off-by: NTom Warren <twarren@nvidia.com>

The UniPhier EHCI driver (drivers/usb/host/ehci-uniphier.c) does
nothing special but set the base address and handle reset/clock.

Since commit 4feefdcf ("usb: add clock support for generic EHCI"),
the generic one (drivers/usb/host/ehci-generic.c) can do those, too.

We no longer need to stick to the dedicated driver.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Add nand driver support for zynqmp. The Nand
controller used in ZynqMP is Arasan Nand Flash
controller.
Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>
[scottwood: Fix checkpatch warning]
Signed-off-by: NScott Wood <oss@buserror.net>

enable net driver model for k2g evm as keystone_net supports
driver model
Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

enable net driver model for k2e evm as keystone_net supports
driver model
Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

enable net driver model for k2l evm as keystone_net supports
driver model
Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>