Add the "spi-flash" compatible string so that the generic sf_probe
driver can probe the SPI flash on the theadorable Armada-XP board.
Signed-off-by: NStefan Roese <sr@denx.de>

With patch 49b23e03 (pci: mvebu: Increase size of PCIe default mapping)
the mapping size for each PCI(e) controller was increased from 32MiB to
128MiB. This leads to problems on boards with multiple PCIe slots / ports
which are unable to map all PCIe ports, e.g. the Armada-XP theadorable:

DRAM:  2 GiB (667 MHz, 64-bit, ECC not enabled)
SF: Detected m25p128 with page size 256 Bytes, erase size 256 KiB, total 16 MiB
Cannot add window '4:f8', conflicts with another window
PCIe unable to add mbus window for mem at f0000000+08000000
Model: Marvell Armada XP theadorable

This patch moves the base address for the PCI(e) memory spaces from
0xe8000000 to the end of SDRAM (clipped to a max of 0xc0000000 right now).
This gives move room and flexibility for PCI(e) mappings.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: VlaoMao <vlaomao@gmail.com>
Tested-by: VlaoMao <vlaomao at gmail.com>

Patch "ARM: rmobile: Mark 4-64GiB as DRAM on Gen3" marked the entire
64bit DRAM space as cachable. On CortexA57, this might result in odd
side effects, where the CPU tries to prefetch from those areas and if
there is no DRAM backing them, CPU bus hang can happen.

This patch fixes it by generating the mem_map structure based on the
actual memory layout obtained from the DT, thus not marking areas
without any DRAM behind them as cachable.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Fixes: c1ec3476 ("ARM: rmobile: Mark 4-64GiB as DRAM on Gen3")
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

Using imply for SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION instead of
select ensures we can build without partition support (used to build
a network boot only version of SPL and U-Boot).
Signed-off-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>

At the moment we rely on the infamous get_ram_size() function to learn
the actual DRAM size in U-Boot proper. This function has two issues:
1) It only works if the DRAM size is a power of two. We start to see
boards which have 3GB of (usable) DRAM, so this does not fit anymore.
2) As U-Boot has no notion of reserved memory so far, it will happily
ride through the DRAM, possibly stepping on secure-only memory. This
could be a region of DRAM reserved for OP-TEE or some other secure
payload, for instance. It will most likely crash in that case.

As the SPL DRAM init routine has very accurate knowledge of the actual
DRAM size, lets propagate this wisdom to U-Boot proper.
We re-purpose a currently reserved word in our SPL header for that.
The SPL itself stores the detected DRAM size there, and bumps the SPL
header version number in that case. U-Boot proper checks for a valid
SPL header and a high enough version number, then uses the DRAM size
from there. If the SPL header field is not sufficient, we fall back to
the old DRAM scanning routine.

Part of the DRAM might be present and probed by SPL, but not accessible
by the CPU. They're restricted in the main U-Boot binary, when accessing
the DRAM size from SPL header.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Acked-by: NMaxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>

Allwinner 64-bit SoCs can use 4GiB DRAM chip, however their memory map
has only allocated 3GiB for DRAM, so only 3GiB of the DRAM is
accessible.

Add a Kconfig option for the maximum accessible DRAM.

For A80 it should be a much higher value (8GiB), but as I have no A80
device to test and originally U-Boot only supports 2GiB DRAM on A80, it
currently still falls under the 2GiB situation.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Reviewed-by: NAndre Przywara <andre.przywara@arm.com>
Acked-by: NMaxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>

All Allwinner 64-bit SoCs now are known to be able to access 3GiB of
external DRAM, however the size of DRAM part in the MMU translation
table is still 2GiB.

Change the size of DRAM part in MMU table to 3GiB.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Reviewed-by: NAndre Przywara <andre.przywara@arm.com>
Acked-by: NMaxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>

On Allwinner SoCs we use some free bytes at the beginning of the SPL image
to store various information. We have a version byte to allow updates,
but changing this always requires all tools to be updated as well.

Introduce the concept of semantic versioning [1] to the SPL header:
The major part of the version number only changes on incompatible
updates, a minor number bump indicates backward compatibility.
This patch just documents the major/minor split, adds some comments
to the header file and uses the versioning information for the existing
users.

[1] https://semver.orgSigned-off-by: NAndre Przywara <andre.przywara@arm.com>
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Acked-by: NMaxime Ripard <maxime.ripard@bootlin.com>
Acked-by: NJagan Teki <jagan@openedev.com>

The Pine A64 Plus/non-Plus model detection code is now built on all
64-bit ARM SoCs, even if the code cannot be triggered when H5/H6 is in
use.

Disable them when the board is Pine A64 by adding a Kconfig option that
is only selected on Pine A64.

On GCC 7.3.1 this makes the size of the function reduces 184 bytes, and
saves a 104 byte strstr() function, then makes SPL on H6 succeed to
build.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Reviewed-by: NAndre Przywara <andre.przywara@arm.com>
Acked-by: NMaxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>

Fix below build warning.

arch/arm/dts/fsl-imx8qxp-mek.dtb: Warning (avoid_unnecessary_addr_size):
/regulators: unnecessary #address-cells/#size-cells without "ranges"
or child "reg" property
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

Introduce a new script to check whether file exists and
use that check in Makefile to avoid break CI system.

The script return 1 when the required files not exists, return 0
when files exists. The script will ignore check to u-boot-dtb.bin,
because if there is something wrong to generate u-boot-dtb.bin,
there must be some code error.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

Signed-off-by: NPriit Laes <plaes@plaes.org>
Acked-by: NMaxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>

This is required for the current Linux kernel to reboot. It should also
probably be fixed in Linux.
Signed-off-by: NCédric Le Goater <clg@kaod.org>
Reviewed-by: NSimon Glass <sjg@chromium.org>

We can have the case where u-boot is launched after some other low level
enabler, like for example when u-boot runs after arm-trusted-firmware
and/or optee. So, because of that we may need to jump the initialization of
some IP blocks even because we may no longer have the permission for that.

So, if the config option to skip low level init is set disable also timer,
board and csu initialization.
Signed-off-by: NRui Miguel Silva <rui.silva@linaro.org>
Signed-off-by: NBryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: u-boot@lists.denx.de
Reviewed-by: NPeng Fan <peng.fan@nxp.com>

When building i.MX8/8X board, use imx8image type.

`-e $(CONFIG_SYS_TEXT_BASE)` is not needed, but
no harm to keep it for i.MX8/8X
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

Add i.MX8QXP MEK board support
Enabled pinctrl/clk/power-domain/mmc/i2c/fec driver.
Added README file.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NAnatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>

Introduce dtsi for i.MX8QXP, since there is other variants i.MX8DX(P),
so add them there, because i.MX8QXP includes the dtsi of them.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NAnatolij Gustschin <agust@denx.de>

Add the power domain DM driver for i.MX8, that it depends on the DTB
power domain trees to generate the power domain provider devices. Users
need to add power domain trees with property "compatible = "nxp,imx8-pd";"

When power on a PD device, the driver will power on its ancestor PD
devices in power domain tree.

When power off a PD device, the driver will check its child PD devices
first. Only if all child PD devices are off, then power off the current PD
device. Then the driver checks sibling PD devices. If sibling PD devices
are off, then it will power off parent PD device.

There is no counter maintained in this driver, but a state to hold current
on/off state. So the request and free functions are empty.

The power domain implementation in i.MX8 DTB set the "#power-domain-cells"
to 0, so there is no ID binding with each PD device. We don't use "id"
variable in struct power_domain. At the same time, we have to set of_xlate
to empty to bypass standard of_xlate in uclass driver.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NAnatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Add i.MX8 support, there are 8 GPIO banks.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NAnatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

This driver is mostly used to avoid build errors.
We use uclass clk driver for clk related operations.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NAnatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Add iomux configuration api.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NAnatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

print_cpuinfo() in board init code requires uclass CPU driver,
add it to be able to display CPU info when CONFIG_DISPLAY_CPUINFO
option is enabled. CPU node in DT will have to include 'clocks'
and 'u-boot,dm-pre-reloc' properties for generic print_cpuinfo()
to work as expected. The driver outputs info for i.MX8QXP Rev A
and Rev B CPUs.
Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: NPeng Fan <peng.fan@nxp.com>

FEC driver requires imx_get_mac_from_fuse(). Add it in preparation
for ENETx support.
Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: NPeng Fan <peng.fan@nxp.com>

Add arch_cpu_init(_dm) mainly to open the channel between ACore and SCU.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NAnatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Add mmu memmap, some memory regions are reserved by M4, Arm Trusted
Firmware, so need to get memreg using SCFW API and setup the memmap.

Add dram_init, dram_init_banksize, get_effective_memsize functions,
according to the memreg.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NAnatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Implement mmc_get_env_dev for i.MX8.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NAnatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Add get_boot_device to detect boot device.
Add print_bootinfo to print the boot device info.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NAnatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Add basic cpu support, including cpu revision, cpu type,
cpu core detection.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NAnatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Add helper functions to identify different armv8 variants.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NAnatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Add i.MX8 cpu type and is_imx8/is_imx8qxp help macros.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

Include i.MX8QXP pin header when CONFIG_IMX8QXP defined,
if no SoC macro defined, report error.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NAnatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Add imx-regs header file to include the register base definition
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NAnatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

i.MX8 support FLEXSPI boot support. So add FLEXSPI boot entry.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NAnatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Add clk/misc/pad/pm/rm scfw api implementaion for different
drivers to invoke. The low level code is using misc_call
to invoke imx8_scu driver.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NAnatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Add scu_dev for i.MX8, this will be used as a handle
to communite with SCU from A35.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NAnatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Build mach-imx for i.MX8
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NAnatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Add Kconfig entry for i.MX8QXP
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NAnatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Add SCFW macro definition.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NAnatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

This converts the following to Kconfig:
   CONFIG_FLASH_CFI_DRIVER
   CONFIG_SYS_FLASH_USE_BUFFER_WRITE
   CONFIG_FLASH_CFI_MTD
   CONFIG_SYS_FLASH_PROTECTION
   CONFIG_SYS_FLASH_CFI
Signed-off-by: NAdam Ford <aford173@gmail.com>
[trini: Re-migrate]
Signed-off-by: NTom Rini <trini@konsulko.com>

This value is unly used in arch/arm/mach-omap2/am33xx/
clock_am33xx.c, so let's make it dependent on AM33XX since
that is the only way this file gets compiled into the code
according to the Makefile.
Signed-off-by: NAdam Ford <aford173@gmail.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
[trini: Fix symbol name]
Signed-off-by: NTom Rini <trini@konsulko.com>