- 13 8月, 2019 11 次提交
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由 Adam Ford 提交于
A previous patch for enabling the NAND config set a flag called CONFIG_SKIP_LOWLEVEL_INIT when it should have been called CONFIG_SKIP_LOWLEVEL_INIT_ONLY. The affect this had was creating a delay on startup for the NOR version which is XIP and doesn't have SPL, so the lowlevel initialization functions need to operate. This delay was not really noticeable at first, but the delays have been getting longer, finally reached the point of nearly seven seconds before the board would appear to start. This patch sets the CONFIG_SKIP_LOWLEVEL_INIT_ONLY instead which means "The normal CP15 init (such as enabling the instruction cache) is still performed" per the README. It doesn't appear to have any adverse behavior on the SPI Flash or the NAND flash boards which use SPL. Fixes: 93f33627 ("ARM: configs: Add da850evm_nand to boot from NAND") Signed-off-by: NAdam Ford <aford173@gmail.com>
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由 Sekhar Nori 提交于
Enable support for Intel E1000 based PCIe ethernet cards that can be used to test PCIe RC functionality on AM65x EVM. Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Sekhar Nori 提交于
Add needed device-tree nodes to support PCIe 0 and SERDES on AM65x SoC. The nodes are kept disabled by default. Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Sekhar Nori 提交于
Enable support for PCIe and related configurations on AM654 EVM platform. Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Sekhar Nori 提交于
Add a new SERDES driver for TI's AM654x SoC which configures the SERDES only for PCIe. Support fo USB3 can be added later. SERDES in am654x has three input clocks (left input, external reference clock and right input) and two output clocks (left output and right output) in addition to a PLL mux clock which the SERDES uses for Clock Multiplier Unit (CMU refclock). The PLL mux clock can select from one of the three input clocks. The right output can select between left input and external reference clock while the left output can select between the right input and external reference clock. The driver has support to select PLL mux and left/right output mux as specified in device tree. Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Sekhar Nori 提交于
Add driver supporting PCIe root-complex available on TI's AM65x SoC. Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Sekhar Nori 提交于
Current dev_read_*() API lacks support to get address and size of a "reg" property by name or index. Add support for the same. Livetree support has been added but not tested on real hardware. The existing unit tests testing reading address from device-tree have been updated to test address as well as size. Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Sekhar Nori 提交于
Add support for clk_is_match() which is required to know if two clock pointers point to the same exact physical clock. Also add a unit test for the new API. Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Nishanth Menon 提交于
Failure log for ti_sci_power_domain_on/off is as below: "ti_sci_power_domain_on: get/set_device failed (-19)" The above information is useless for debug without information on what specific device access failed. So add that information as well. Signed-off-by: NNishanth Menon <nm@ti.com> Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
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由 Hannes Schmelzer 提交于
This commit adds support for the B&R brsmarc1 SoM. The SoM is based on TI's AM335x SoC. Mainly vxWorks 6.9.4.x is running on the board, doing some PLC stuff on various carrier boards. Signed-off-by: NHannes Schmelzer <hannes.schmelzer@br-automation.com>
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由 Suniel Mahesh 提交于
This patch disables DM watchdog support for SPL builds and uses the legacy omap watchdog driver on TI AM335x chipsets. The following build error is reported if DM watchdog support was enabled in SPL: CC spl/drivers/usb/gadget/rndis.o LD spl/drivers/usb/gadget/built-in.o LD spl/drivers/usb/musb-new/built-in.o LD spl/drivers/built-in.o LD spl/u-boot-spl arm-linux-ld.bfd: u-boot-spl section .u_boot_list will not fit in region .sram arm-linux-ld.bfd: region .sram overflowed by 440 bytes make[1]: *** [spl/u-boot-spl] Error 1 make: *** [spl/u-boot-spl] Error 2 Adjusted WATCHDOG_RESET macro accordingly. Earlier it was pointing to hw_watchdog_reset. Since CONFIG_WATCHDOG replaces CONFIG_HW_WATCHDOG, now WATCHDOG_RESET macro points to watchdog_reset. This watchdog_reset is not defined anywhere for am33xx/omap2 and needs to be defined. Fixed this by simply calling hw_watchdog_reset in watchdog_reset. Built and tested on AM335x device (BeagleboneBlack), compile tested for all other AM33xx/omap2 based boards. Signed-off-by: NSuniel Mahesh <sunil.m@techveda.org> [trini: Fix watchdog.h logic] Signed-off-by: NTom Rini <trini@konsulko.com>
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- 12 8月, 2019 4 次提交
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由 Suniel Mahesh 提交于
This patch adds device tree and driver model watchdog support, converts the legacy omap watchdog driver to driver model for TI AM335x chipsets. The following compile warning is removed: ===================== WARNING ====================== This board does not use CONFIG_WDT (DM watchdog support). Please update the board to use CONFIG_WDT before the v2019.10 release. Failure to update by the deadline may result in board removal. See doc/driver-model/MIGRATION.txt for more info. ==================================================== CONFIG_HW_WATCHDOG is no more a default option for AM33XX devices after DT/DM conversion, adjusted kconfig accordingly. DM watchdog support is enabled by default in SPL. The SPL image doesn't fit into SRAM because of size constraints and build breaks with an overflow. For this reason DM watchdog support should be disabled in SPL, driver code should be adjusted accordingly to serve this purpose. Built and tested on AM335x device (BeagleboneBlack), compile tested for all other AM33xx based boards. Signed-off-by: NSuniel Mahesh <sunil.m@techveda.org>
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由 Anselm Busse 提交于
The SPL for the Overo board does not initialise the MMC. Hence, it cannot load the main boot loader from the SD card susequently. This patch moves the initialisation code for the MMC so it gets included in the SPL. [trini: Add missing header] Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Anatolij Gustschin 提交于
giedi and deneb are i.MX8X based and have additional data with WLAN MAC in factoryset container. Enable building for these boards and adapt factoryset functions to set WLAN MAC and dtb name in environment. Signed-off-by: NAnatolij Gustschin <agust@denx.de>
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由 Anatolij Gustschin 提交于
For new boards we always enable DM_I2C. Extend factoryset functions to support EEPROM reading on these boards. Signed-off-by: NAnatolij Gustschin <agust@denx.de>
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- 11 8月, 2019 2 次提交
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git://git.denx.de/u-boot-usb由 Tom Rini 提交于
- DaVinci USB updates - Various OHCI fixes - Gadget fixes
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- 10 8月, 2019 23 次提交
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https://gitlab.denx.de/u-boot/custodians/u-boot-x86由 Tom Rini 提交于
- Enable SD slot on Intel Edison - Populate CSRT ACPI table for shared DMA controller on Intel Tangier - Convert Intel ICH-SPI driver to use new spi-mem ops - Enable config_distro_bootcmd for QEMU x86 - Support U-Boot as a payload for Intel Slim Bootloader - Avoid writing temporary asl files into the source tree which fixes the parallel build issue occasionally seen
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由 Marek Vasut 提交于
Add board code for the R8A77980 V3H Condor board. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Add a few bits of platform code to support R8A77980 V3H SoC. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Import R8A77980 V3H DTs and headers from Linux 5.2.7 , commit 5697a9d3d55f. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Import R8A77980 V3H clock tables from Linux 5.2.7 , commit 5697a9d3d55f. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Import R8A77980 V3H PFC tables from Linux 5.2.7 , commit 5697a9d3d55f. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Fix various type warnings when building this driver for 64bit machine. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
The R8A77980 V3H gether needs a few minor adjustments to the sh_eth driver, add them to support ethernet on R8A77980. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Igor Opaniuk 提交于
Remove obsolete legacy usbboot wrapper, as distroboot can handle booting from USB drivers. Signed-off-by: NIgor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: NOleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Marcel Ziswiler 提交于
Support the V1.2 hardware revision with the following pin muxing changes: Ddc_scl_pv4 and ddc_sda_pv5 previously used as Apalis GPIO3 and GPIO4 are now used as DDC pins. Gen2_i2c_scl_pt5 and gen2_i2c_sda_pt6 previously used as DDC pins are now used as USB power enable signals. Usb_vbus_en0_pn4 and usb_vbus_en1_pn5 previously used as USB power enable signals are now used as GPIO3 and GPIO4. Additionally a new device tree file tegra124-apalis-v1.2-eval.dtb is loaded on V1.2 and later modules and resp. USB power enable signals activated. Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: NIgor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Dominik Sliwa 提交于
When mainline kernels reboot TK1 they use SW_RESET, that reset mode does not reset PMIC. Some rails need to be off for RAM Re-repair to work correctly. Reviewed-by: NOleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: NDominik Sliwa <dominik.sliwa@toradex.com> Signed-off-by: NIgor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Marcel Ziswiler 提交于
Remove video=tegrafb0:640x480-16@60 aka VESA VGA mode from vidargs in order for the panel specification in the device tree to be used. This causes the default to be the 10.1" LVDS display which will be available in the Toradex webshop shortly. Reviewed-by: NOleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: NIgor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Dominik Sliwa 提交于
Display proper reset reason after the SoC info. Signed-off-by: NDominik Sliwa <dominik.sliwa@toradex.com> Signed-off-by: NIgor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: NOleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Igor Opaniuk 提交于
Switch to the generic compressed Kernel image type (zImage) instead of the U-Boot specific uImage format. Reviewed-by: NOleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: NBhuvanchandra DV <bhuvanchandra.dv@toradex.com> Signed-off-by: NIgor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Igor Opaniuk 提交于
Disabling ASPM fixes incompatibilities with some PCIe cards Reviewed-by: NOleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: NDominik Sliwa <dominik.sliwa@toradex.com> Signed-off-by: NIgor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Igor Opaniuk 提交于
Let the kernel print some debug messages when a user program crashes due to an exception. Signed-off-by: NStefan Agner <stefan.agner@toradex.com> Signed-off-by: NIgor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: NOleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Igor Opaniuk 提交于
Use unified values for USB Product/Vendor numbers when the config block is missing Reviewed-by: NOleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: NMax Krummenacher <max.krummenacher@toradex.com> Signed-off-by: NIgor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Igor Opaniuk 提交于
Make sure the Apalis GPIO 8 aka FAN_EN is on when using Apalis TK1 modules. Reviewed-by: NOleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: NIgor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by: NDominik Sliwa <dominik.sliwa@toradex.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Marcel Ziswiler 提交于
By keeping RESET_MOCI_CTRL low we avoid explicitly releasing RESET_MOCI#. Please note that module hardware versions up to V1.1A will already release RESET_MOCI# in hardware coming out of reset. Please further note that with this change the USB hub on the Apalis Evaluation board is kept in reset in U-Boot and therefore none of its ports are operational in U-Boot. Reviewed-by: NOleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: NIgor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Igor Opaniuk 提交于
We never really added a sensible DFU configuration for platforms based on eMMC. Most of the things one might want to do can also be done with UMS or fastboot, so drop the DFU configuration. Signed-off-by: NIgor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: NPhilippe Schenker <philippe.schenker@toradex.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Trent Piepho 提交于
This is a configuration option specific to the tegra controller. Doing it this way makes it show up directly under the tegra controller option, indented one level, as "Disable external clock loopback". The way it is now, it shows up at the end of the controller list, not indented, as if it's some kind of generic MMC configuration option. Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Simon Glass <sjg@chromium.org> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Tom Warren <twarren@nvidia.com> Signed-off-by: NTrent Piepho <tpiepho@impinj.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Simon Glass 提交于
For U-Boot we allow a GPIO to be specified to enable the codec. Add this to the relevant binding files. Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Warren <twarren@nvidia.com>
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