- 14 1月, 2016 4 次提交
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由 Stefan Roese 提交于
This patch adds full DM support to the SPL on MVEBU. Currently only serial is supported. Other drivers will follow. This patch also adds the necessary config values for the DEBUG UART to the MVEBU defconfig files. This came in handy while implementing this DM support. Additionally, the mvebu specific SPL linker script is removed and this common one is used instead: arch/arm/cpu/u-boot-spl.lds This common linker script already handles all special cases. No need to reinvent the wheel for MVEBU here. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Simon Glass <sjg@chromium.org>
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由 Stefan Roese 提交于
gcc 5.1 generates this new warning (for Armada 38x platforms): drivers/ddr/marvell/a38x/ddr3_debug.c: In function 'hws_ddr3_tip_read_training_result': drivers/ddr/marvell/a38x/ddr3_debug.c:177:40: warning: 'sizeof' on array function parameter 'result' will return size of 'enum hws_result (*)[1]' [-Wsizeof-array-argument] memcpy(result, training_result, sizeof(result)); ^ drivers/ddr/marvell/a38x/ddr3_debug.c:171:31: note: declared here u32 dev_num, enum hws_result result[MAX_STAGE_LIMIT][MAX_INTERFACE_NUM]) ^ Since this functions is not referenced anywhere, lets just remove it. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
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由 Stefan Roese 提交于
By using the common timer functions for mvebu/kirkwood we can get rid of quite a lot of code. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Simon Guinot <simon.guinot@sequanux.org> Cc: Valentin Longchamp <valentin.longchamp@keymile.com>
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由 Stefan Monnier 提交于
In order to support large IDE disks we need to make certain types be lbaint_t now. Reviewed-by: NTom Rini <trini@konsulko.com> Signed-off-by: NStefan Monnier <monnier@iro.umontreal.ca>
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- 13 1月, 2016 36 次提交
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由 Masahiro Yamada 提交于
To boot Linux, we should prevent Initramdisk and FDT from going too high. Currently, boot_relocate_fdt() checks "fdt_high" environment first, and then falls back to getenv_bootm_mapsize() + getenv_bootm_low() if "fdt_high" is missing. On the other hand, boot_ramdisk_high() only checks "initrd_high" to get the address limit for the Initramdisk. We also want to let this case fall back to getenv_bootm_mapsize() + getenv_bootm_low(). Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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由 Mugunthan V N 提交于
Add new api to get device address based on index. Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Acked-by: NJagan Teki <jteki@openedev.com> [Rebased on master] Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
include/power/pmic.h never used any generic spi code from include/spi.h, but this has been added in below commit. "dm: pmic: add implementation of driver model pmic uclass" (sha1: 4d9057e8) Adding functionalities in include/spi.h will trigger a build issue as this been added used in include/power/pmic.h Build issue on trats2 with adding BIT macro on spi.h: ---------------------------------------------------- CC lib/asm-offsets.s In file included from include/power/pmic.h:15:0, from include/power/max77686_pmic.h:11, from include/configs/trats2.h:212, from include/config.h:5, from include/common.h:18, from lib/asm-offsets.c:15: include/spi.h: In function 'spi_w8r8': include/spi.h:327:2: warning: implicit declaration of function 'BIT' [-Wimplicit-function-declaration] Cc: Simon Glass <sjg@chromium.org> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Reported-by: NTom Rini <trini@konsulko.com> Signed-off-by: NJagan Teki <jteki@openedev.com> Reviewed-by: NTom Rini <trini@konsulko.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Mugunthan V N 提交于
enable spi driver model for am437x_sk_evm as ti_qspi supports driver model Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NJagan Teki <jteki@openedev.com>
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由 Mugunthan V N 提交于
Add qspi memory map address to device tree. Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NJagan Teki <jteki@openedev.com>
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由 Mugunthan V N 提交于
Since OMAP's spl doesn't support DM currently, do not define DM_SPI and DM_SPI_FLASH for spl build. Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NJagan Teki <jteki@openedev.com>
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由 Mugunthan V N 提交于
enable spi driver model for dra74_evm as ti_qspi supports driver model Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NJagan Teki <jteki@openedev.com>
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由 Mugunthan V N 提交于
enable mmc driver model for dra72_evm as ti_qspi supports driver model Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NJagan Teki <jteki@openedev.com>
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由 Mugunthan V N 提交于
In U-Boot most flashes uses "spi-flash" as compatible to bind the device to flash driver, so adding "spi-flash" compatible to m25p80 node. Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Reviewed-by: NJagan Teki <jteki@openedev.com>
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由 Mugunthan V N 提交于
In U-Boot most flashes uses "spi-flash" as compatible to bind the device to flash driver, so adding "spi-flash" compatible to m25p80 node. Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Reviewed-by: NJagan Teki <jteki@openedev.com>
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由 Mugunthan V N 提交于
In U-Boot most flashes uses "spi-flash" as compatible to bind the device to flash driver, so adding "spi-flash" compatible to m25p80 node. Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Reviewed-by: NJagan Teki <jteki@openedev.com>
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由 Mugunthan V N 提交于
Add qspi memory map and control module register maps to device tree. Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NJagan Teki <jteki@openedev.com>
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由 Mugunthan V N 提交于
adopt ti_qspi driver to device driver model Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NJagan Teki <jteki@openedev.com>
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由 Mugunthan V N 提交于
add spi alias for qspi so that spi probes the device and driver successfully. Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NJagan Teki <jteki@openedev.com>
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由 Mugunthan V N 提交于
Since OMAP's spl doesn't support DM currently, do not define DM_SPI and DM_SPI_FLASH for spl build. Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Reviewed-by: NJagan Teki <jteki@openedev.com>
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由 Mugunthan V N 提交于
spi bus can support dual and quad wire data transfers for tx and rx. So defining dual and quad modes for both tx and rx. Also add support to parse bus width used for spi tx and rx transfers. Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Reviewed-by: NJagan Teki <jteki@openedev.com> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Mugunthan V N 提交于
Prepare driver for DM conversion. Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Reviewed-by: NJagan Teki <jteki@openedev.com>
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由 Mugunthan V N 提交于
Changing the ti_qspi_priv structure and its instance names from to priv for driver mode conversion. Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NJagan Teki <jteki@openedev.com>
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由 Mugunthan V N 提交于
To enable memory map in dra7xx, specific chip select must be written to control module register. But this hard coded to chip select 1, fixing it by writing the specific chip select value to control module register. Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
Added SPI_TX_DUAL mode flag. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: NJagan Teki <jteki@openedev.com> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
SLOW, FAST, DUAL, DUAL_IO, QUAD, QUAD_IO changed order to SLOW, FAST, DUAL, QUAD, DUAL_IO, QUAD_IO Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: NJagan Teki <jteki@openedev.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
- Add comments on mode_rx - Tab space's Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: NMugunthan V N <mugunthanvnm@ti.com> Tested-by: NBin Meng <bmeng.cn@gmail.com> Tested-by: NJagan Teki <jteki@openedev.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
Used BIT macro like 1 << nr as BIT(nr) where nr is 0...n Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: NMugunthan V N <mugunthanvnm@ti.com> Tested-by: NBin Meng <bmeng.cn@gmail.com> Tested-by: NJagan Teki <jteki@openedev.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
Fixed bit assignment with flags members on spi_slave{} Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: NMugunthan V N <mugunthanvnm@ti.com> Tested-by: NBin Meng <bmeng.cn@gmail.com> Tested-by: NJagan Teki <jteki@openedev.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
This patch moves flags macro's to respective member position on spi_slave{}, for better readabilty and finding the respective member macro's easily. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: NMugunthan V N <mugunthanvnm@ti.com> Tested-by: NJagan Teki <jteki@openedev.com> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
Since spi rx mode macro's are renamed to simple and meaninfull, this patch will rename the respective structure members. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: NMugunthan V N <mugunthanvnm@ti.com> Tested-by: NJagan Teki <jteki@openedev.com> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
SPI_OPM_RX_AS - SPI_RX_SLOW SPI_OPM_RX_AF - SPI_RX_FAST SPI_OPM_RX_DOUT - SPI_RX_DUAL SPI_OPM_RX_QOF - SPI_RX_QUAD Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: NMugunthan V N <mugunthanvnm@ti.com> Tested-by: NBin Meng <bmeng.cn@gmail.com> Tested-by: NJagan Teki <jteki@openedev.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
SPI_OPM_RX_DIO and SPI_OPM_RX_QIOF are rx IO commands/opmodes for dual and quad. Usually IO operation's are referred to flash protocol rather with spi controller protocol, these are still present in flash side for the usage of spi-nor controllers. Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: NMugunthan V N <mugunthanvnm@ti.com> Tested-by: NBin Meng <bmeng.cn@gmail.com> Tested-by: NJagan Teki <jteki@openedev.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
SPI_OPM_RX_EXTN is a combination of all rx opmode's and spi driver shall use any one of the rx mode at a time not the combination and it is true in case of flash where spi_flash_table mention combination of supported read opmodes so-that the required one will pick based on the rx mode from spi driver. Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: NMugunthan V N <mugunthanvnm@ti.com> Tested-by: NBin Meng <bmeng.cn@gmail.com> Tested-by: NJagan Teki <jteki@openedev.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
While setting quad bit on spansion, macronix code is writing only particular quad bit this may give wrong functionality with other register bits, So this patch fix the issue where it with write previous read reg status along particular quad bit. Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
One macronix quad bit set using SR, it's good to read back and check the written bit and also if it's already been set check for the bit and return. Cc: Vignesh R <vigneshr@ti.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Tested-by: NMugunthan V N <mugunthanvnm@ti.com> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
One spansion quad bit set using CR, it's good to read back and check the written bit and also if it's already been set check for the bit and return. Cc: Vignesh R <vigneshr@ti.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: NMugunthan V N <mugunthanvnm@ti.com> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
Setting up quad bit for micron devices need to do the same way as other flash devices like spansion, winbond etc does using enhanced volatile config register so this patch adds this support instead of printing "QEB is volatile" Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Peter Pan <peterpandong@micron.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
Used BIT macro like 1 << nr as BIT(nr) where nr is 0...n Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
- Tab space - Place all read commands at one place. - Re-arrange write commands. Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Signed-off-by: NJagan Teki <jteki@openedev.com>
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由 Jagan Teki 提交于
Use direct call to device_remove instead of exctra spi_flash_remove defination. Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NJagan Teki <jteki@openedev.com>
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