1. 21 2月, 2015 8 次提交
  2. 13 2月, 2015 1 次提交
  3. 08 2月, 2015 2 次提交
  4. 07 2月, 2015 2 次提交
  5. 30 1月, 2015 2 次提交
    • L
      vexpress64: support the Juno Development Platform · ffc10373
      Linus Walleij 提交于
      The Juno Development Platform is a physical Versatile Express
      device with some differences from the emulated semihosting
      models. The main difference is that the system is split in
      a SoC and an FPGA where the SoC hosts the serial ports at
      totally different adresses.
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      ffc10373
    • L
      vexpress64: get rid of CONFIG_SYS_EXTRA_OPTIONS · f91afc4d
      Linus Walleij 提交于
      The Versatile Express ARMv8 semihosted FVP platform is still
      using the legacy CONFIG_SYS_EXTRA_OPTIONS method to configure
      some compile-time flags. Get rid of this and create a Kconfig
      entry for the FVP model, and a selectable bool for the
      semihosting library.
      
      The FVP subboard is now modeled as a target choice so we can
      eventually choose between different ARMv8 versatile express
      boards (FVP, base model, Juno...) this way. All dependent
      symbols are updated to reflect this.
      
      The 64bit Versatile Express board symbols are renamed
      VEXPRESS64 so we have some chance to see what is actually
      going on. Tested on the FVP fast model.
      Acked-by: NSteve Rae <srae@broadcom.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      f91afc4d
  6. 22 1月, 2015 2 次提交
  7. 19 1月, 2015 1 次提交
    • S
      arm: mx6: Add Barco platinum-picon and platinum-titanium · 5d6050fd
      Stefan Roese 提交于
      This patch adds the new Barco platinum platform. It currently
      includes those two boards:
      
      platinum-titanium
      -----------------
      This is the same board as the titanium that is already supported in
      mainline U-Boot. But its now moved to this new platform to support
      multiple "flavors" of imx6 boards in one directory. Its also moved
      to support SPL booting. And with this we use the run-time DDR
      configuration of this SPL support. The board is equipped with the
      Micron MT41J128M16JT-125 DDR chips. We now can remove the DDR
      related registers tuples from the imximage.cfg file. As all this
      is done in the SPL at run-time.
      
      platinum-picon
      --------------
      This board is new and based on the MX6DL with 1GiB DDR using the
      Micron MT41K256M16HA DDR3 chips. Its also equipped with 2 NAND
      chips (each 512MiB).
      Signed-off-by: NStefan Roese <sr@denx.de>
      Cc: Stefano Babic <sbabic@denx.de>
      Cc: Pieter Ronsijn <pieter.ronsijn@barco.com>
      5d6050fd
  8. 18 12月, 2014 1 次提交
  9. 12 12月, 2014 2 次提交
  10. 10 12月, 2014 1 次提交
  11. 08 12月, 2014 1 次提交
  12. 01 12月, 2014 1 次提交
  13. 28 11月, 2014 1 次提交
  14. 24 11月, 2014 1 次提交
  15. 23 11月, 2014 1 次提交
  16. 17 11月, 2014 4 次提交
  17. 14 11月, 2014 1 次提交
  18. 13 11月, 2014 4 次提交
  19. 05 11月, 2014 1 次提交
  20. 31 10月, 2014 1 次提交
  21. 30 10月, 2014 1 次提交
  22. 29 10月, 2014 1 次提交
    • G
      kconfig: arm: introduce symbol for ARM CPUs · 2e07c249
      Georges Savoundararadj 提交于
      This commit introduces a Kconfig symbol for each ARM CPU:
      CPU_ARM720T, CPU_ARM920T, CPU_ARM926EJS, CPU_ARM946ES, CPU_ARM1136,
      CPU_ARM1176, CPU_V7, CPU_PXA, CPU_SA1100.
      Also, it adds the CPU feature Kconfig symbol HAS_VBAR which is selected
      for CPU_ARM1176 and CPU_V7.
      
      For each target, the corresponding CPU is selected and the definition of
      SYS_CPU in the corresponding Kconfig file is removed.
      
      Also, it removes redundant "string" type in some Kconfig files.
      Signed-off-by: NGeorges Savoundararadj <savoundg@gmail.com>
      Acked-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>
      Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
      2e07c249