1. 05 5月, 2019 1 次提交
  2. 18 4月, 2019 1 次提交
  3. 19 1月, 2019 1 次提交
    • P
      Kconfig: Migrate BOUNCE_BUFFER · 2acc24fc
      Philipp Tomsich 提交于
      The bounce buffer is used by a few drivers (most of the MMC drivers)
      to overcome limitations in their respective DMA implementation.
      
      This moves the configuration to Kconfig and makes it user-selectable
      (even though it will be a required feature to make those drivers
      work): the expected usage is for drivers depending on this to 'select'
      it unconditionally from their respective Kconfig (see follow-up
      patches).
      
      This commit includes a full migration using moveconfig.py to ensure
      that each commit compiles.  To ensure bisectability we update
      dependencies of various drivers to now select BOUNCE_BUFFER when needed.
      
      [trini: Squash all patches to ensure bisectability]
      Signed-off-by: NTom Rini <trini@konsulko.com>
      Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
      Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion]
      Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion]
      Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
      2acc24fc
  4. 19 12月, 2018 1 次提交
  5. 29 11月, 2018 1 次提交
  6. 22 11月, 2018 1 次提交
  7. 16 10月, 2018 1 次提交
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      arm64: versal: Add support for new Xilinx Versal ACAPs · ec48b6c9
      Michal Simek 提交于
      Xilinx is introducing Versal, an adaptive compute acceleration platform
      (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine
      Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent
      Engines with leading-edge memory and interfacing technologies to deliver
      powerful heterogeneous acceleration for any application. The Versal AI
      Core series has five devices, offering 128 to 400 AI Engines. The series
      includes dual-core Arm Cortex™-A72 application processors, dual-core Arm
      Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more
      than 1,900 DSP engines optimized for high-precision floating point with
      low latency.
      
      The patch is adding necessary infrastructure in place without enabling
      platform which is done in separate patch.
      Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
      ec48b6c9
  8. 11 9月, 2018 2 次提交
  9. 11 7月, 2018 1 次提交
    • T
      board: arm: Add support for Broadcom BCM7445 · 894c3ad2
      Thomas Fitzsimmons 提交于
      Add support for loading U-Boot on the Broadcom 7445 SoC.  This port
      assumes Broadcom's BOLT bootloader is acting as the second stage
      bootloader, and U-Boot is acting as the third stage bootloader, loaded
      as an ELF program by BOLT.
      Signed-off-by: NThomas Fitzsimmons <fitzsim@fitzsim.org>
      Cc: Stefan Roese <sr@denx.de>
      Cc: Tom Rini <trini@konsulko.com>
      Cc: Florian Fainelli <f.fainelli@gmail.com>
      894c3ad2
  10. 24 5月, 2018 1 次提交
  11. 08 5月, 2018 1 次提交
  12. 22 4月, 2018 1 次提交
  13. 12 4月, 2018 1 次提交
  14. 09 4月, 2018 1 次提交
  15. 30 3月, 2018 2 次提交
  16. 01 3月, 2018 2 次提交
  17. 26 2月, 2018 1 次提交
  18. 09 2月, 2018 2 次提交
  19. 29 1月, 2018 1 次提交
    • A
      mmc: Add bcm2835 sdhost controller · c8a73a26
      Alexander Graf 提交于
      The BCM2835 family of SoCs has 2 different SD controllers: One based on
      the SDHCI spec and a custom, home-grown one.
      
      This patch implements a driver for the latter based on the Linux driver.
      This is needed so that we can make use of device trees that assume driver
      presence of both SD controllers.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      c8a73a26
  20. 24 1月, 2018 1 次提交
  21. 12 1月, 2018 6 次提交
  22. 30 11月, 2017 1 次提交
  23. 17 11月, 2017 1 次提交
  24. 09 10月, 2017 1 次提交
  25. 28 9月, 2017 1 次提交
    • P
      mmc: Add MMC support for stm32h7 Socs · b312c590
      Patrice Chotard 提交于
      This patch adds SD/MMC support for STM32H7 SoCs.
      
      Here is an extraction of SDMMC main features, embedded in
      STM32H7 SoCs.
      The SD/MMC block include the following:
       _ Full compliance with MultiMediaCard System Specification
         Version 4.51. Card support for three different databus modes:
         1-bit (default), 4-bit and 8-bit.
       _ Full compatibility with previous versions of MultiMediaCards
         (backward compatibility).
       _ Full compliance with SD memory card specifications version 4.1.
         (SDR104 SDMMC_CK speed limited to maximum allowed IO speed,
          SPI mode and UHS-II mode not supported).
       _ Full compliance with SDIO card specification version 4.0.
         Card support for two different databus modes: 1-bit (default)
         and 4-bit. (SDR104 SDMMC_CK speed limited to maximum allowed IO
         speed, SPI mode and UHS-II mode not supported).
       _ Data transfer up to 208 Mbyte/s for the 8 bit mode.
         (depending maximum allowed IO speed).
       _ Data and command output enable signals to control external
         bidirectional drivers.
      
      The current version of the SDMMC supports only one SD/SDIO/MMC card
      at any one time and a stack of MMC Version 4.51 or previous.
      Signed-off-by: NChristophe Kerello <christophe.kerello@st.com>
      Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>
      Reviewed-by: NSimon Glass <sjg@chromium.org>
      b312c590
  26. 22 9月, 2017 2 次提交
  27. 29 8月, 2017 1 次提交
    • M
      mmc: sunxi: Support new mode · de9b1771
      Maxime Ripard 提交于
      Almost all of the newer Allwinner SoCs have a new operating mode for the
      eMMC clocks that needs to be enabled in both the clock and the MMC
      controller.
      
      Details about that mode are sparse, and the name itself (new mode vs old
      mode) doesn't give much details, but it seems that the it changes the
      sampling of the MMC clock. One side effect is also that it divides the
      parent clock rate by 2.
      
      Add support for it through a Kconfig option.
      Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
      Reviewed-by: NJagan Teki <jagan@openedev.com>
      de9b1771
  28. 17 8月, 2017 2 次提交
  29. 01 8月, 2017 1 次提交
    • S
      dm: mmc: Allow disabling driver model in SPL · c4d660d4
      Simon Glass 提交于
      At present if U-Boot proper uses driver model for MMC, then SPL has to
      also. While this is desirable, it places a significant barrier to moving
      to driver model in some cases. For example, with a space-constrained SPL
      it may be necessary to enable CONFIG_SPL_OF_PLATDATA which involves
      adjusting some drivers.
      
      Add new SPL versions of the options for DM_MMC, DM_MMC_OPS and BLK. By
      default these follow their non-SPL versions, but this can be changed by
      boards which need it.
      Signed-off-by: NSimon Glass <sjg@chromium.org>
      c4d660d4